Example4: 3-bit Up/Down Counter The 3-bit Up/Down Counter ...

1 Q 2 X=0 (up) X=1 (down) Clear Figure 36.1 3-bit Up/Down Counter . Digital Logic Design: Sequential Logic with PLDs 388 The main definitions and declarations of the ABEL input file for the Up/Down Counter is shown. Table 36.3. Pin Definition CLOCK, CLEAR, X pin 1, 2, 3; Q0, Q1, Q2 pin 21, 22, 23 ISTYPE ‘reg,buffer’; ... ................
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