0.47 µF 2 BIAS GND 7 C Datasheet C 1 4 Monaural Speaker ...

Datasheet

Class-AB Speaker Amplifier Series

2.8 W High Power Monaural Speaker Amplifier for Automotive

BD783xxEFJ-M BD783xxUEFJ-M Series

General Description BD783xxEFJ-M, BD783xxUEFJ-M Series are Class-AB monaural speaker amplifiers designed for automotive. Class-AB amplifiers have no requirements for care about EMI noise. Adopting power package HTSOP-J8 achieves high output power. Low quiescent current can reduce battery consumption. Shutdown current is also very low (0.1 ?A Typ) and pop noise level when switching to shutdown is very small, so this device is suitable for applications in which the mode often changes between "shutdown state" and "active state".

Features AEC-Q100 Qualified(Note 1) Pop Noise Reduction Function Shutdown Function Protection Functions - Over Current Protection - Thermal Shutdown - Under Voltage Lock Out (UVLO) Power Package with Thermal Pad HTSOP-J8

(Note 1) Grade2

Key Specifications

Output Power

1.2 W (Typ)

(VDD = 5 V, RL = 8 , THD+N = 1 %)

Output Power

2.8 W (Typ)

(VDD = 5 V, RL = 4 , THD+N = 10 %)

Quiescent Current

2.5 mA (Typ)

Shutdown Current

0.1 ?A (Typ)

Total Harmonic Distortion + Noise

(RL = 8 , f = 1 kHz) Output Noise Voltage

0.05 % (Typ)(Note 2) 15 VRMS (Typ)(Note 2)

Voltage Gain

6.0 dB to 26.0 dB (Typ)

Operating Temperature Range -40 ?C to +105 ?C

(Note 2) Characteristic of BD78306EFJ-M

Package HTSOP-J8

W (Typ) x D (Typ) x H (Max) 4.90 mm x 6.00 mm x 1.00 mm

Applications Automotive Instruments

Typical Application Circuit

HTSOP-J8

1 SDB From System

Control

C1

2 BIAS 0.47 ?F

Input Signal

C2

3 INP 0.47 ?F

C3

4 INN

0.47 ?F

OUTN 8

GND 7 VDD 6

C4

10 ?F VDD

OUTP 5

Figure 1

Product structure : Silicon integrated circuit

? 2019 ROHM Co., Ltd. All rights reserved. TSZ22111 ? 14 ? 001

This product has no designed protection against radioactive rays.

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Pin Configuration

SDB 1 BIAS 2

INP 3 INN 4

(TOP VIEW) EXP-PAD

8 OUTN 7 GND 6 VDD 5 OUTP

Caution: VDD and GND pins adjoin each other. In case that these pins are shorted each other, it may make characteristics of power supply device worse, or it may damage power supply device. Considering this point, select power supply device which has protection functions as over current protection.

Pin Description Pin No. Pin Name

Function

1

SDB Shutdown

2

BIAS Bias

3

INP Positive differential input

4

INN Negative differential input

5

OUTP Positive output

6

VDD Power supply

7

GND Ground

8

OUTN Negative output

-

EXP-PAD Connect the EXP-PAD to Ground

Control Pin's Setting SDB pin High Low

Operating Mode Active

Shutdown

Block Diagram

INP

3

INN

4

BIAS

2

6

VDD Rf

Ri

Ri Rf Rf Ri

Ri Rf

Bias

SDB

1

GND

7

Figure 2

OUTP 5

OUTN 8

Over Current Pro tection Thermal Shu tdo wn

Under Vol tage Lock O ut

Part Number

BD78306EFJ-M BD78306UEFJ-M BD78310EFJ-M BD78310UEFJ-M BD78326EFJ-M BD78326UEFJ-M

Ri[k] (Typ)

90

70

16

Rf[k] (Typ)

90

110

164

? 2019 ROHM Co., Ltd. All rights reserved. TSZ22111 ? 15 ? 001

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Absolute Maximum Ratings (Ta = 25 ?C)

Parameter

Symbol

Rating

Unit

Supply Voltage

VDDmax

7.0

V

Input Voltage

Vin

-0.3 to VDD+0.3

V

Storage Temperature Range

Tstg

-55 to +150

?C

Maximum Junction Temperature

Tjmax

150

?C

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating.

Thermal Resistance(Note 1)

Parameter

Symbol

Thermal Resistance (Typ)

Unit

1s(Note 3)

2s2p(Note 4)

HTSOP-J8

Junction to Ambient

JA

149.4

39.8

?C/W

Junction to Top Characterization Parameter(Note 2)

JT

11.0

9.0

?C/W

(Note 1) Based on JESD51-2A (Still-Air), using a BD78326EFJ-M Chip. (Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package. (Note 3) Using a PCB board based on JESD51-3. (Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of Measurement Board

Single

Material

Board Size

FR-4 114.3 mm x 76.2 mm x 1.57 mmt

Top Copper Pattern Footprints and Traces

Layer Number of Measurement Board

4 Layers

Thickness 70 m

Material FR-4

Board Size 114.3 mm x 76.2 mm x 1.6 mmt

Top

2 Internal Layers

Copper Pattern

Thickness

Copper Pattern

Thickness

Footprints and Traces

70 m 74.2 mm x 74.2 mm

(Note 5) This thermal via connects with the copper pattern of all layers.

35 m

Thermal Via(Note 5)

Pitch

Diameter

1.20 mm

0.30 mm

Bottom Copper Pattern 74.2 mm x 74.2 mm

Thickness 70 m

Use a thermal design that has sufficient margin in consideration of power dissipation under actual operating conditions. This IC exposes its frame at the backside of package. Note that this part is assumed to be used after providing heat dissipation treatment to improve heat dissipation efficiency. Try to put heat dissipation pattern as wide as possible not only on the board surface but also on the backside.

Under the insufficient heat dissipation and excessive large signal input condition, power dissipation (Pdiss) exceeds maximum power dissipation (Pd) and thermal shutdown function may operate. Thermal design should be considered so that Pdiss is lower than Pd. Reference data of Pdiss is listed on P.7. (Tjmax : Maximum Junction Temperature = 150 ?C, Ta : Operating Ambient Temperature[?C], ja : Package Thermal Resistance[?C/W])

Power dissipation:

= ( - ) / [W]

This IC has thermal shutdown function. Thermal shutdown operates when Tj (junction temperature, which is assumed to be same as chip temperature) rises over about 180 ?C (Typ) and be released when Tj fall about 160 ?C (Typ) or less. Thermal shutdown is designed to protect the IC from temperature condition that exceeds Tjmax = 150 ?C, not to protect or warrant application set.

Note that device reliability is affected if it is used under temperature thermal shutdown operates.

? 2019 ROHM Co., Ltd. All rights reserved. TSZ22111 ? 15 ? 001

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BD783xxEFJ-M BD783xxUEFJ-M Series

Recommended Operating Conditions

Parameter

Symbol

Min

Typ Max Unit

Operating Supply Voltage

VDD

4.0

5.0

5.5

V

Operating Temperature

Topr

-40

+25 +105

?C

Load Resistance

RL

3.2

8.0

38.4

Caution: Operating supply voltage and operating temperature are the ranges in which the IC is available for basic operation. (Basic operation means that the IC operates without emitting unexpected noise or stopping signal.) Characteristics and rating are not warranted in the whole operating supply voltage and operating temperature.

Electrical Characteristics 1

(Unless otherwise specified Ta = -40 ?C to +105 ?C, VDD = 5.0 V, f = 1 kHz, RL = 8 , BTL(Note 1), Active)

Parameter

Symbol

Limits

Min

Typ

Max

Unit

Conditions

Quiescent Current

ICC

-

2.5

6.0

mA No load

Shutdown Current Input Impedance Output Offset Voltage

ISD ZIN VOFS

-

0.1

25.0

?A

Shutdown SDB = Low

ZIN x0.4

ZIN

ZIN x1.6

k Refer to the table below

-30

0

+30

mV OUTP-OUTN

Control Pin (SDB)

Input Voltage

High Level Low Level

VIH

2.0

-

VDD

V

VIL

0

-

0.3

V

Under Voltage Lock Out (UVLO)

Threshold Supply

Detection

VUVLO_DET

-

3.43 3.80

V

Voltage

Release

VUVLO_REL

-

3.58 3.95

V

(Note 1) "BTL" means the state that RL is connected between the OUTP pin (pin5) and the OUTN pin (pin8).

Part Number

BD78306EFJ-M BD78306UEFJ-M BD78310EFJ-M BD78310UEFJ-M BD78326EFJ-M BD78326UEFJ-M

ZIN[k] (Typ)

45

35

8

Electrical Characteristics 2

(Unless otherwise specified Ta = 25 ?C, VDD = 5.0 V, f = 1 kHz, RL = 8 , BTL, Active)

Parameter

Symbol

Limits

Min

Typ

Max

Unit

Conditions

THD+N = 1 %,

Rated Output Power(Note 2)

PO

0.9

1.2

1.6

W

BW = 400 Hz to 30 kHz Continuous output time

60 s

THD+N = 10 %,

Maximum Output Power

POMAX

-

1.6

-

W

BW = 400 Hz to 30 kHz Continuous output time

90 s

Total Harmonic Distortion + Noise

THD+N

-

-

0.5

%

PO = 1 W BW = 400 Hz to 30 kHz

Voltage Gain(Note 2) Shutdown Attenuation

GV

GV - 1

GV

GV + 1

dB

PO = 0.5 W GV = 6 dB to 26 dB

ATTSD

-

-90

-80

dB

Vin = 0.1 VRMS BW = 400 Hz to 30 kHz

Power Supply Rejection Ratio

PSRR

-

-60

-40

dB

Vripple = 0.2 VP-P, C1 = 0.47 ?F BW = A-Weight

Output Noise Voltage

VNO

-

-

100

?VRMS

C1 = 0.47 ?F BW = A-Weight

(Note 2) The typical performance of device is shown Output Power and Voltage Gain. It largely depends on the board layout, parts, and power supply. The typical values are measured with the device and parts mounting on surface of ROHM's board directly and soldering thermal pad backside of package to top layer cupper pattern of the board.

This IC is applicable to only dynamic speaker, not to other loads.

? 2019 ROHM Co., Ltd. All rights reserved. TSZ22111 ? 15 ? 001

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Typical Performance Curves

4.0

3.0 VUVLO_DET

2.0 RL = No Load

1.5

2.0

1.0

RL = 8 SDB = 0 V

Shutdown Current : ISD [?A]

Quiescent Current : ICC [mA]

1.0

VUVLO_REL

0.5

0.0

3

4

5

6

7

Supply Voltage : VDD [V]

Figure 3. Quiescent Current vs Supply Voltage

0.0 01234567 Supply Voltage : VDD [V]

Figure 4. Shutdown Current vs Supply Voltage

Total Harmonic Distortion + Noise : THD+N [%]

Total Harmonic Distortion + Noise : THD+N [%]

BD78306EFJ-M 10

VDD = 5 V RL = 8

1

BD78326EFJ-M 10

1

0.1

0.01

0.001 0.001

f = 100 Hz (30 kHz LPF) f = 1 kHz (BW = 400 Hz to 30 kHz) f = 10 kHz (BW = 400 Hz to 80 kHz)

0.01

0.1

1

10

Output Power : PO [W]

0.1

VDD = 5 V RL = 8

0.01

0.001 0.001

f = 100 Hz (30 kHz LPF) f = 1 kHz (BW = 400 Hz to 30 kHz) f = 10 kHz (BW = 400 Hz to 80 kHz)

0.01

0.1

1

10

Output Power : PO [W]

Figure 5. Total Harmonic Distortion + Noise vs Output Power

Figure 6. Total Harmonic Distortion + Noise vs Output Power

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TSZ02201-0C1C0EC00760-1-2 28.Mar.2023 Rev.002

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