EET 120



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EET 120

Spring 2000

The Binary Counter

By:

Kenneth E. Dudeck

Partners:

Joe E. Smith

Hugo First

12 February 2000

Abstract:

This experiment illustrates the setup and operation of a 74LS163 synchronous 4-bit binary counter integrated circuit (IC) chip. This chip is capable of “counting” the number of times that a digital input cycles from 0 to 1. The count is generated and available as 4-bit binary output. The binary counter sequence is obtained and the time and frequency relationships of the clock input and count outputs are shown as well.

Introduction:

The 74LS163 Synchronous 4-bit Binary counter is shown below. The chip is power with 5VDC on pin #16 and the power supply ground is applied to pin #7.

The CLK input, pin #2, is the clock input pulses that are to be counted. Every time the input changes from 0 to 5VDC (positive edge), the binary count increments by one. This 4-bit binary count is available on the QD, QC, QB, and QA outputs.

QD is the most significant bit. The binary count sequence is the following: 0000, 0001, 0010, …., 1110, 1111, 0000, and repeats.

These are the only pins that will be used in this lab. However the IC has additional features such as a parallel load input number, the D, C, B,A inputs, that control from which number the count sequence begins at when the LOAD input is grounded. Also the CLR input resets the count to 0000 when grounded.

The ENT and ENP inputs are enable inputs that both need to be high to enable the counter to count. The Ripple Count Output

Figure 1 (RCO) is high when the count is 1111.

If the Q outputs are connected to four Light Emitting Diodes (LEDs), the binary count sequence can be easily observed when the frequency of the clock is low (approximately 5 Hz or less). When the frequency of the clock is increased, the outputs change too rapidly to observe all the binary count codes.

Procedure and Results:

The 74LS163 chip was placed on the TTL Designer Breadboard Kit. This console provided 5VDC power, TTL switch inputs, TTL LED outputs, and a TTL clock generator. The 5VDC was applied to pin #16 and the power supply ground was applied to pin number #8. Figure 2 shows the functional schematic for this experiment. The chip power connections are omitted for clarity, but understood to be there. One of the push button switches, located at the bottom right off the designer kit, was connected to pin #2 of the counter, and the four count outputs: QD, QC, QB, and QA were connected to the four LEDs provided along the top of the kit.

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Figure 2

Each time the switch was pushed, a new binary pattern on the lights was observed. The following sequence was observed (Note: 0 – indicates an OFF LED and 1 - indicates an ON LED):

0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111, 0000, 0001, 0010, . . . .

The lights went all off after they were all on, indicating that the count went back to zero after fifteen.

The clock input was removed from the push button and placed on the clock generator located on the bottom left of the kit. The frequency of the clock was set to 1 Hz and the LEDs blinked in the sequence as before, only now automatically. As the frequency of the clock was increased to 10, 100, 1000, and finally 10,000 Hz, the LEDs blinked faster and faster. At 1000 Hz, the most significant LED, QD, could be still be seen blinking, while the other three appeared to be on all the time. At 10kHz the all LEDs appeared to be continuously on.

In order to observe the counting sequence at 10kHz, the CLK, QA, QB, QC, QD were in turn connected to the oscilloscope. Two waveforms at a time were displayed. The

observed waveforms are shown below with the Clock input frequency set to 1kHz.

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Figure 3

The period of each of these waveforms, T, was measured by counting the horizontal divisions on the oscilloscope for one complete square wave, and then multiplied by the horizontal time-base sensitivity. The frequency, F, of each waveform was then calculated by using the following formula:

[pic] ( Eq. 1)

Table 1 shows the measured period and calculated frequency for each waveform shown in Figure 3.

|Pin |Period (ms) |Freq (Hz) |

|CLK | 0.96 |1042 |

|QA |1.9 | 526 |

|QB |3.8 | 263 |

|QC |7.6 | 132 |

|QD |15.2 | 66 |

Table 1

It can be seen that the period of QA is twice the period of the clock, while QB is four, QC is eight, and QD is sixteen times the period of the clock. The frequency of QD is approximately 1/16 of the clock, measured within experimental error. In this manner, the 74LS163 can be thought of as a frequency divider, whereby a larger clock frequency can be decreased by a particular power of 2 and used to trigger some slower event.

Conclusion:

In this laboratory experiment, it was shown that a 74LS163 synchronous 4-bit can be used to count the number of times a switch is opened and closed. This may be an useful application for counting the number of people entering a room, and then triggering some other event when the specified number has entered.

When the frequency of count pulses increases, the binary count sequence is not easily seen by the naked eye but rather viewed on an oscilloscope. The resulting counter output waveforms shown the frequency divider nature of the counter. This application of the counter may be useful for slowing down the operation of a computer program.

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