Unit – 2 Combinational Logic Circuits



10CS 33 LOGIC DESIGN UNIT ? 2 Combinational Logic Circuits

Unit ? 2 Combinational Logic Circuits

Objectives

? Understand what are combinational logic circuits ? Use the sum-of-products method to design a logic circuit based on a design truth table ? Be able to make Karnaugh maps and use them to simplify Boolean expressions

Introduction

Logic Circuits are categorized into 2 types (based on whether they contain memory or not): ? Combinational Logic Circuits o Circuits without memory ? Sequential Logic Circuits o Circuits with memory

Combinational Logic Circuits

The output of combinational logic circuit depends only on the current inputs. A combinational logic circuit block is as shown below:

There are two fundamental approaches in logic design. They are: ? The Sum-of-Products (SOP) Method ? Solution results in an AND-OR or NAND-NAND network

Page 1



10CS 33 LOGIC DESIGN UNIT ? 2 Combinational Logic Circuits

? The Product-of-Sums (POS) Method

? Solution results in an OR-AND or NOR-NOR network

We select a simpler circuit because it costs less and is more reliable.

The Sum-of-Products (SOP) Method

Product term

A product term is a conjunction of literals, where each literal is either a Boolean variable or its complement.

Examples: A . B

A' . B. C'

A

Fundamental product or Minterm

For a function of n variables, a product term in which each of the n variables appears once (in uncomplemented or complemented form) is called a fundamental product or minterm

Fundamental Products for Two inputs

Consider two inputs A and B. The fundamental products or minterms are listed below:

Inputs

A

B

0

0

0

1

1

0

1

1

Fundamental products or minterms

m0 = A' . B'

m1 = A' . B

m2 = A . B'

m3 = A . B

Sum-of-Products (SOP) Equation The SOP equation can be represented by an expression that is a sum of minterms, where each minterm is ANDed with the value of Y for the corresponding valuation of input variables. Consider,

Y = m0 . 0 + m1 . 1 + m2 . 1 + m3 . 1 = m1 + m2 + m3 = A' . B + A . B' + A . B

Page 2



10CS 33 LOGIC DESIGN UNIT ? 2 Combinational Logic Circuits

Compact form Y = f(A, B) = m(1, 2, 3)

Truth Table:

Inputs

Output

Logic Circuit

A

B

Y

0

0

0

0

1

1

1

0

1

1

1

1

For the obtained SOP equation, we can realize the logic circuit by drawing an AND-OR network as shown below:

Another way of realization is by a NAND-NAND network as shown below:

Simplified Logic Circuit Consider the Boolean SOP equation:

Y = A' . B + A . B' + A . B

Page 3



10CS 33 LOGIC DESIGN UNIT ? 2 Combinational Logic Circuits

We can simplify it

Y

= A' . B + A . B' + A . B + A . B

= A' . B + A . B + A . B' + A . B

= B . (A' + A) + A . (B' + B)

= B . 1 + A . 1 = B + A = (A + B)

Logic Circuit:

Y = (A + B) Canonical Sum-of-Products Form If each product term is a minterm, then the expression is said to be in a canonical sum-of-products form or standard SOP form. Example:

Y = A' . B + A . B' + A . B (canonical SOP form) Y = A + B (simplified form) 3 Variable Example: Y = A' . B . C + A . B' . C + A . B . C' + A . B . C = F(A, B, C) = m(3, 5, 6, 7) Simplification Y = A' . B . C + A . B' . C + A . B . C' + A . B . C Y = B . C . (A' + A) + A . C .(B' + B) + A . B . (C' + C) using Adjacency Theorem = B . C. 1 + A . C . 1 + A . B . 1 = B . C + A . C + A . B Y = A . B + A . C + B . C

Page 4



10CS 33 LOGIC DESIGN UNIT ? 2 Combinational Logic Circuits

The simplified logic expression is realized using NAND gates as shown below:

Truth Table To Karnaugh Map

A Karnaugh map (K-map) is a visual display of the fundamental products for a SOP solution. K-map is a modification of the Venn diagram and refinement of Edward Veitch's diagram. K-map was developed by Maurice Karnaugh, an American Physicist. 2 ? Variable Karnaugh Map Consider the Venn diagram for the two variables A and B.

The diagram is rewritten as shown below:

Page 5

 ................
................

In order to avoid copyright disputes, this page is only a partial summary.

Google Online Preview   Download