EE577b Verilog for Behavioral Modeling - University of Southern California
EE577b Verilog for Behavioral Modeling
Verilog for Behavioral Modeling
Nestoras Tzartzanis E-mail: nestoras@isi.edu
Dept. of Electrical Engineering-Systems University of Southern California
Nestoras Tzartzanis
1
February 3, 1998
EE577b Verilog for Behavioral Modeling
Objective of the Lecture
? To address those features of Verilog that are required for the class project discussion will be limited to behavioral modeling features will be briefly presented emphasis will be given to the examples
Nestoras Tzartzanis
2
February 3, 1998
EE577b Verilog for Behavioral Modeling
Warning
? This lecture includes features supported by and tested with the Cadence Verilog-XL simulator
? The primary source of the presented material is the Cadence Verilog-XL Reference Manual
Nestoras Tzartzanis
3
February 3, 1998
EE577b Verilog for Behavioral Modeling
Outline
?
Introduction
?
Data types
?
Expressions
?
Assignments
?
Behavioral modeling
?
Hierarchical structures (modules)
?
System (built-in) functions
?
Example
Nestoras Tzartzanis
4
February 3, 1998
EE577b Verilog for Behavioral Modeling
Verilog Features
? Verilog can simulate models at the following levels: algorithmic RTL gate switch
? Verilog offers: behavioral language structural language
Nestoras Tzartzanis
5
February 3, 1998
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