Design for Yield Using Statistical Design - Stanford University
Design for Yield Using Statistical Design
Fabian Klass
Director of Technology and Manufacturing
EE 380 Computer Systems Colloquium, Stanford University
February 7, 2007
8/31/05
P.A. Semi, Inc. - Company Confidential
1
Outline
About P.A.Semi Process Variability Statistical Models Circuit Examples Statistical Timing PVT Margin Test Structures CAD Challenges Summary
2
About P.A. Semi
Santa Clara-based fabless processor company
Power ArchitectureTM Licensee Design our own Power Architecture processors Only 3rd company after IBM and Freescale
Noted industry veterans combine in 150-strong organization Venture backed by Bessemer, Venrock, and Highland Capital Currently engaged with over 100 customers across different market segments
Strategically partnered with IBM Breakthrough processor solution focused on low power @ high performance
Scalable 64-Bit Power multicore architecture Redefines high performance (2GHz) at ultra low power (4W) 39 patents filed and 11 more patents in progress towards filing
3
Target Markets
Compute Server Blades
Digital Entertainment
Embedded Boards
Game Players
Critical Requirements
Power Efficiency
High Performance Cost Efficiency
Throughput Efficiency Open source OS/Tools etc
Imaging Systems
Storage Systems
Wireless Basestations
Routers Switches
4
The Challenge
Power Management
Process Variability
5
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