Thesis - Henry Samueli School of Engineering

Nov 28, 1998 · Examples: a 1 Kbyte, direct mapped (1 way associative) cache with line size of 32 bytes has 32 entries direct mapped to the lower 10 bits of memory addresses. A 4 way associative cache with the same parameters would have 32 entries grouped in 8 groups of 4, with each group mapped to the lower 8 bits of memory addresses. ... 0.112 % 9.298 % 14 ... ................
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