NIRMA UNIVERSITY



NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.TECH. (I.C) SEMESTER – III

2IC203 : DIGITAL TECHNIQUES (TA)

|SR.NO |TITLE |PAGE |DATE |SIGN |REMARK |

| | |FROM |TO | | | |

|1 |BINARY SYSTEMS -1 | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

|2 |BINARY SYSTEMS -2 | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

| | | | | | | |

|3 |BOOLEAN ALGEBRA AND LOGIC GATES | | | | | |

|4 |SIMPLIFICATION OF BOOLEAN FUNCTION | | | | | |

|5 |COMBINATIONAL LOGIC | | | | | |

|6 |COMBINATIONAL LOGIC WITH MSI AND LSI | | | | | |

|7 |SEQUENTIAL LOGIC | | | | | |

|8 |REGISTER DESIGNING | | | | | |

|9 |COUNTER DESIGNING-1 | | | | | |

|10 |COUNTER DESIGNING-2 | | | | | |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 1

Date of issue :____________ Date of submission:___________

|1 |Convert the following decimal numbers to binary : |

| | |

| |0.65625, 25.5 and 255 . |

|2 |Convert the decimal number 225.225 to base 2, base ,base 8, base16. |

|3 |Add and multiply the following numbers in the given base without converting to decimal. |

| | |

| |( a ) ( 367 )8 and (715 )8 |

| |( b ) ( 296 )12 and ( 57 )12 |

|4 |Perform the subtraction with the following decimal numbers using |

| |( 1 ) 10's complement and ( 2 ) 9's complement. Check the answer by straight subtraction. |

| | |

| |( a ) 3570 - 2100 ( b ) 20 - 1000 |

|5 |Perform the subtraction with the following binary numbers using |

| |( 1 ) 2's complement and ( 2 ) 1's complement. Check the answer by straight subtraction. |

| | |

| |( a ) 11010 -10000 ( b ) 100 - 110000 |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 2

Date of issue :____________ Date of submission:___________

|1 |Explain the Gray code. |

|2 |Convert the following binary numbers to gray code: |

| |(a) 0100 (b) 0110 |

|3 |Convert the following gray numbers to binary code: |

| |(a) 10000 (b) 0110 |

|4 |Express the following switching circuit in binary logic notation. |

| | |

| | |

| | |

| | |

| |[pic] [pic] |

| | |

| | |

| | |

|5 |Represent the decimal number 4096 |

| | |

| |( a ) in BCD. |

| |( b ) in Excess-3 code. |

| |( c ) in 2, 4, 2, 1 code. |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 3

Date of issue :____________ Date of submission:___________

|1 |Simplify the following Boolean functions to a minimum number of literal. |

| | |

| |( a ) xyz + x'y + xyz' |

| |( b ) y(wz' + wz) + x y |

| | |

|2 |Reduce the following Boolean expression to the required number of literal. |

| | |

| |( a ) [( CD )' + A ]' + A + CD + AB (three) |

| |( b ) ( A +C +D ) ( A + C + D )( A + C' + D )( A + B' ) (four) |

|3 |Express the following functions in a sum of minterms and a product of maxterms. |

| | |

| |( a ) F( A, B, C, D ) = D ( A' + B ) + B'D |

| |( b ) F( x, y, z ) = 1 |

|4 |Convert the following to the other canonical form |

| | |

| |( a ) F( x, y, z ) = ( (1, 3, 7 ) |

| |( b ) F(A, B, C, D ) = ( ( 0, 1, 2, 3, 4, 6, 12 ) |

| | |

|5 |Given two Boolean functions F1 and F2.show that the Boolean function E = F1 + F2, obtained by ORing the two functions, contains the sum |

| |of all the minterms in F1 and F2. |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 4

Date of issue :____________ Date of submission:___________

|1 |Simplify the following functions in Sum of Product using K-map method. |

| | |

| |( a ) F( A, B, C, D ) = ( ( 7, 13, 14, 15 ) |

| |( b ) F(a,b,c) = d(a'+ b) + b'(c+ ab) |

| |( d ) F(a,b,c,d,e) = a'b'ce' + a'b'c'd '+ b'd'e' + b'cd' + cde' + bde' |

|2 |Simplify each of the following functions and implement them with NAND gates. |

| | |

| |( a ) F1= AC' +ACE +ACE'+A'CD'+ A'D'E' |

| |( b ) F2= (B'+D') ( A' + C' + D )( A + B' + C' + D ) ( A' + B + C' + D' ) |

|3 |Implement the following function using the don’t care conditions. Assume that both the normal and complement inputs are available. |

| | |

| |( a ) F = A' B' C' + AB' D + A' B' CD' ( With no more than two NOR gates.) |

| |d = ABC + AB' D' |

|4 |Simplify the Boolean function F in ( I ) sum of products and ( II ) product of sums using the don't-care conditions d : |

| | |

| |( a ) F = ACE +A' CD' E' + A' C' DE d =DE' + A'D'E + AD'E' |

| |( b ) F =B' DE' + A' BE + B' C' E' + A'BC' D' d =BDE' + CD' E' |

| | |

|5 |Simplify the following Boolean function by means of the tabulation method. |

| | |

| |F( A, B, C, D, E, F ) = ( ( 20, 28, 38, 39, 52, 60, 102, 103, 127 ) |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 5

Date of issue :____________ Date of submission:___________

|1 |Design a combinational circuit whose input is a four-bit number and whose output is the 2’s complement of the input number. |

|2 |A combinational circuit has four inputs and one output. The output is equal to 1 when (1) all the inputs are equal to 1 or (2) none of |

| |the inputs are equal to 1 or (3) an odd number of the inputs are equal to 1. |

| | |

| |( a ) Obtain the truth table. |

| |( b ) Find the simplified output function in sum of ptoducts. |

| |( c ) Find the simplified output function in product of sum. |

| |( d ) Draw the two logic diagrams. |

| | |

|3 |Design a combinational circuit to check for even parity for four bits. A logic–1 output is required when the four bits do not constitute|

| |an even parity. |

|4 |Implement the Boolean function F = AB' CD' + A' BCD' + AB' C' D + A' BC' D with exclusive-OR and AND gates. |

|5 |Implement the four Boolean functions listed using three half-adder circuits |

| | |

| |D = A ( B ( C |

| |E = A'BC + AB'C |

| |F = ABC' + (A' + B')C |

| |G = ABC |

| | |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 6

Date of issue :____________ Date of submission:___________

|1 |Design BCD to Excess –3 code converter with BCD to decimal decoder and four OR gates. |

|2 |Implement the following function with a multiplexer. A, B and D are the selection lines and C is the input line. |

| |F (A, B, C, D) = ( ( 0, 1, 3, 4, 8, 9, 15) |

|3 |A combinational circuit is defined by the following three functions: |

| | |

| |F1 = x' y' + xyz' |

| |F2 = x' + y |

| |F3 = xy + x' y' |

| | |

| |Design a circuit with decoder and external gates. |

|4 |Draw only diagram of 6x 64 decoder using nine 3x8 decoders. |

| | |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 7

Date of issue :____________ Date of submission:___________

|1 |Draw the logic diagram of a clocked D flip-flop with AND and NOR gates. |

|2 |Consider a JK’ flip-flop, i.e., a JK flip-flop with an inverter between external input K’ and internal input K. |

| |( a ) Obtain the flip-flop characteristic table. |

| |( b ) Obtain the characteristic equation. |

| |( c ) Show that tying the two external inputs together forms a D flip-flop. |

|3 |Derive the state table and state diagram of the sequential circuit of figure shown below. What is the function of the circuit. |

A' A B' B

CP

|4 |Reduce the number of states in the following state table and tabulate the reduced state table. |

|Present state |Next State |Output |

| |x = 0 |x = 1 |x = 0 |x = 1 |

|a |f |b |0 |0 |

|b |d |c |0 |0 |

|c |f |e |0 |0 |

|d |g |a |1 |0 |

|e |d |c |0 |0 |

|f |f |b |1 |1 |

|g |g |h |0 |1 |

|h |g |a |1 |0 |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 8

Date of issue :____________ Date of submission:___________

1. Define a register? differentiate between shift register and register with parallel

load?

2. Enlist the control lines and input lines for bi-directional shift register with parallel

load?

3. What is the basic difference between counter and shift register ?

4. Draw schematic diagram of bidirectional shift register with parallel load.

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 9

Date of issue :____________ Date of submission:___________

|1 |A sequential circuit has one input and one output. The state diagram is shown bellow. Design the sequential circuit with RS |

| |flip-flops. |

0/0

1/1 0/0

1/0

0/0 0/0

0/

1/1

1/1 1/1 0/0

| | |

|2 |Design asynchronous mod-6 counter using T flip-flops. |

|3 |Design a counter with the binary sequence : 0,1,3,7,6,4 and repeat. Use T flip-flops. |

|4 |Design a counter with the binary sequence : 0,4,2,1,6 and repeat. Use JK flip-flops. Draw the state diagram of the circuit |

| |including all unused states. |

| | |

NIRMA UNIVERSITY

INSTITUTE OF TECHNOLOGY

B.Tech. SEM -III

SUBJECT- DIGITAL TECHNIQUES

TERM ASSIGNMENT:- 10

Date of issue :____________ Date of submission:___________

1. Draw diagram of the 4-bit up/down counter .

2. List eight unused states in switch-tail ring counter. Determine the next state for each

unused state.

3. Define state table and state diagram of sequential circuit.

4. Construct a Johnson counter with ten timing signals.

-----------------------

Q' Q

T

Q' Q

T

001

011

100

010

000

................
................

In order to avoid copyright disputes, this page is only a partial summary.

Google Online Preview   Download