CS 61C: Great Ideas in Computer Architecture Introduction ...

[Pages:56]CS 61C: Great Ideas in Computer Architecture Introduction to Assembly Language and

MIPS Instruction Set Architecture

Instructors: Bernhard Boser & Randy H. Katz

9/13/16

Fall 2016 - Lecture #5

1

Outline

? Assembly Language ? MIPS Architecture ? Registers vs. Variables ? MIPS Instructions ? C-to-MIPS Patterns ? And in Conclusion ...

9/13/16

Fall 2016 - Lecture #5

2

Outline

? Assembly Language ? MIPS Architecture ? Registers vs. Variables ? MIPS Instructions ? C-to-MIPS Patterns ? And in Conclusion ...

9/13/16

Fall 2016 - Lecture #5

3

Levels of

Representation/Interpretation

High Level Language Program (e.g., C)

temp = v[k]; v[k] = v[k+1]; v[k+1] = temp;

Compiler Assembly Language Program (e.g., MIPS)

Assembler Machine Language

Program (MIPS)

Machine Interpretation

lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2)

sw $t0, 4($2)

Anything can be represented as a number,

i.e., data or instructions

0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111

Hardware Architecture Description (e.g., block diagrams)

Architecture Implementation

Logic Circuit Description (Circuit Schematic Diagrams)

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Fall 2016 - Lecture #5

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5

Assembly Language

? Job of a CPU (Central Processing Unit, aka Core): execute instructions

? Instructions: CPU's primitives operations

? Like a sentence: operations (verbs) applied to operands (objects) processed in sequence ...

? With additional operations to change the sequence

? CPUs belong to "families," each implementing its own set of instructions

? CPU's particular set of instructions implements an Instruction Set Architecture (ISA)

? Examples: ARM, Intel x86, MIPS, RISC-V,

IBM/Motorola PowerPC (old Mac), Intel IA64, ...

9/13/16

Fall 2016 - Lecture #5

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Assembly Language

High Level Language

9/13/16

Fall 2016 - Lecture #5

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Assembly Language

High Level Language

9/13/16

Fall 2016 - Lecture #5

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