A Simple View of NBTI Degradation



A Comprehensive Model for PMOS NBTI Degradation: Recent Progress

Authors1 and Authors2

1Purdue University, West Lafayette, IN 47906, USA

2Department of Electrical Engineering, IIT Bombay, Mumbai 400076, India

Abstract

Negative Bias Temperature Instability (NBTI) is a well-known reliability concern for PMOS transistors. We review the literature to find seven key experimental features of NBTI degradation. These features appear mutually inconsistent and have often defied easy interpretation. By reformulating the Reaction-Diffusion model in a particularly simple form, we show that these seven apparently contradictory features of NBTI actually reflect different facets of the same underlying physical mechanism.

Keywords: CMOS degradation, reliability physics, bias temperature instability, mathematical model, universal scaling

1. Background

Design of any digital circuit is based on the presumption that transistor parameters will remain bounded by a certain margin (typically ±15%) during the projected lifetime of the IC. This margin consists of initial manufacturing tolerance encapsulated in CPK numbers as well as other time-dependent parameter shifts due to various transistor degradation mechanisms like Hot Carrier Degradation (HCI), Gate Dielectric Breakdown (TDDB), Negative Bias Temperature Instability (NBTI), etc. Among them, NBTI has been a persistent (and perhaps most significant) reliability concern for CMOS technology generations below 130 nm node [1-8]. Two factors – increasing oxide field (to enhance transistor performance without scaling gate oxide) and the use of oxynitrides (to prevent Boron penetration and to reduce gate leakage)[9, 10] – appear to have exacerbated this PMOS-specific reliability issue. Specifically, NBTI causes systematic reduction in transistor parameters (e.g., drain current, transconductance, threshold voltage, capacitance, etc.) when a PMOSFET is biased in inversion (VS=VD=VB=VDD and VG=0). Since this NBTI-specific biasing condition arises universally in inverting logic, SRAM cells, I/O system, dynamic logic, etc.[11-13], it is not surprising that the concern about NBTI is pervasive in the semiconductor industry.

Since NBTI has been a reliability concern from the very early days of integrated circuits in mid 1960s [14, 15], there are many reports on various aspects of NBTI degradation over the last 40 years [3]. An extensive review of the state-of-art of the pre-2003 experimental results and the possible theoretical foundations has been made in our previous article in Microelectronics Reliability [1]. After correcting for artifacts arising from incorrect stress condition leading to spuriously high degradation exponent at later stages of degradation, resolving controversies involving oxide field vs. gate voltage dependence, and addressing process specific NBTI degradation issues, the essence and consensus regarding NBTI phenomena until 2002-2003 can be summarized as follows:

(1) The degradation is field-driven and is related to interface traps at the Si/SiO2 interface [4].

(2) Threshold voltage degradation due to NBTI is given by ΔVT ~ A exp(-nED/kT) tn with n~0.25 (see Fig. 1) and ED~0.5 eV [1, 4, 6].

(3) Once NBTI stress is removed, a fraction of interface traps can self-anneal [6, 16-18].

None of the pre-2003 reports, however, seemed to have realized that the values of n and ED of NBTI are self-contradictory and mutually inconsistent. Since 2003, there have been reports about four additional features of NBTI degradation that have further complicated the classical understanding of this degradation phenomenon:

(4) As NBTI became a long term reliability concern, many research groups looked for and found long-term reduction (quasi-saturation?) of NBTI time-exponent n from 0.25 to 0.13-0.16 [5, 8, 17].

(5) A number of groups reported that NBTI is smaller for AC stress compared to DC stress, and the ratio of AC to DC NBTI degradation is frequency independent [6, 9, 18] at least for low frequencies (< 10-100 KHz).

(6) Careful analysis of temperature-dependent NBTI data (see Fig.1) shows characteristics of dispersive transport [1, 2, 19]. If this is indeed the case, lifetime projections at various temperatures would be more difficult than previously presumed.

(7) Classical NBTI models are based on dynamics of broken Si-H bonds and these models are often validated against Charge-pumping data, yet charge pumping technique probes both broken Si-O and Si-H bonds and can not distinguish between them [7]. This raises important concerns regarding the validation of NBTI models. Moreover, the significance of hole trapping in determining the NBTI degradation continues to be an important issue.

Since the original R-D analysis of NBTI [1] did not address these post-2003 issues, there is an incorrect presumption that these new features are incompatible with the R-D model and must be interpreted with new models of NBTI [5, 20, 21]. The goal of this paper is to show that the seven features of NBTI degradation discussed above (to be referred to as Issues 1-7 for the rest of the paper) can be interpreted within the same intuitively simple framework of NBTI degradation discussed in Ref. [1], with a straightforward generalization of the R-D model. And the seven features represent various aspects of the same degradation mechanism. Although the four post-2003 NBTI features of saturation, frequency independence, dispersive temperature dependence, and indistinguishibility between SiO and SiH bonds appear to have complicated the physical picture of NBTI, in reality they hold the key to the puzzle of the pre-2003 NBTI results. In Sec. 2, we analyze the nature of the puzzle of the three observations in pre-2003 literature. In Sec. 3, we show how the post-2003 observations regarding saturation and frequency independence actually help resolve the conceptual inconsistencies. This model then allows us to connect NBTI and HCI degradation and anticipate the degradation in reduced geometry devices, as well as seek resolution of NBTI challenges through circuit techniques. Our Conclusions regarding these issues are summarized in Sec. 4.

2. The R-D Model of NBTI Degradation: Definition of the Puzzle

In the Reaction-Diffusion (R-D) formulation of NBTI degradation [1, 8, 22], one assumes that NBTI arises due to hole-assisted breaking of Si-H bonds at the Si/SiO2 interface (see Fig. 2, top illustration). The rate of trap generation is given by,

[pic] (1*)

where N0 is the initial number of Si-H bond at the Si/SiO2 interface. NIT is the fraction of these Si-H bonds broken at time t due to NBTI stress. The dissociation rate constant kF is proportional to the number of inversion layer holes that are captured by Si-H bonds. The two-electron Si-H covalent bond is weakened once a hole is captured and this weakened bond (assisted by the electric field) is easily broken at relatively moderate temperature. The broken Si bonds acts as a donor trap [23, 24] and contributes to the shift in threshold voltage and reduction in transconductance. The H atoms released in the process can anneal the broken bonds, as described by the second term of the right hand side of (1*) (NH (0) is the H concentration at the interface, x=0), or the H atoms may diffuse (or drift) away from the interface, i.e.,

[pic]. (2*)

The last term in (2*) is negligible. The H atoms may diffuse with diffusion constant (DH) if the atoms are neutral, or drift with mobility μH if they are charged.

Since the rate of trap generation in (1*) is usually small compared to the dissociation and annealing rates and since NIT 0 stress, NIT increases at longer time and shows a power law but higher n (~0.3). The VB>0V induced additional NIT shows a power law of n~0.5, and is identical to that of SILC. Note that hot holes generated in the presence of reverse VB breaks Si-O bonds. Broken Si-O bonds at the oxide bulk gives rise to SILC [39, 40], and those near the Si/SiO2 interface show up as additional NIT. As a further proof, Figure 10 (bottom) shows the recovery of NIT after stress without and with VB. Identical recovery following VB=0 and VB>0 stress suggests that additional NIT created during VB>0 stress does not recover after stress. This is consistent with the above picture as no known mechanism exists for recovery of broken Si-O bonds. It is very important to choose proper NBTI stress condition to avoid generation of hot holes and additional NIT due to broken Si-O bonds, so that R-D model can be used for reliable prediction of device lifetime. This is an important prerequisite for any comparison with experimental data and theoretical model.

We wish to further highlight that even for stress leading to negligible broken SiO bonds, Charge Pumping and On-the-Fly measurements would produce quite different results (Fig.11). The apparently large difference (~10X) of as measured characteristics can mislead one to invoke hole trapping to account for the difference [42]. However as shown in [43], the difference is actually due to the following three reasons. First, Charge Pumping measurements have finite delay, which causes larger time exponent and lower magnitude as shown above. Also, the energy zone in the band gap scanned by Charge Pumping is quite less compared to On-the-Fly IDLIN. Once these differences are taken into account, the difference becomes much less than 2X. Finally, any non-uniform increased trap generation close to the conduction band edge [44] (beyond the Charge Pumping zone) can account for such small difference between corrected Charge Pumping and On-the-Fly IDLIN results.

4. Conclusions and Outlook

NBTI has been persistent reliability concern for Silicon ICs since mid 1960s. A large number of studies of various aspects of NBTI degradation have been reported in the literature. However, a close review of the literature shows that the pre-2003 view of NBTI degradation anticipates a time-exponent and temperature-activation that are not mutually consistent. The post-2003 studies demonstrating NBTI saturation and frequency independence, which although appeared to have complicated the picture, actually holds the key to resolution of previous inconsistencies leading to a very simple view of NBTI degradation: NBTI is an interface trap driven phenomena associated with breaking of Si-H bonds. Although the H is released as atomic H, then they convert to and diffuse as molecular H2. The activation and time exponent of NBTI are defined by this diffusion of molecular neutral H2 at long times (> 100 sec). Sub-100s NIT characteristics are characterized by dynamics of H-H2 conversion. This mechanism should be used as the basis of any lifetime extrapolation protocols for NBTI degradation.

The ability of R-D model to resolve long-standing puzzle of NBTI time exponent (n=1/6) for planar transistors, as discussed in Sec. 3, raises an intriguing possibility: It is well known that HCI degradation (for VG ~ VD/2) involves kinetic dissociation of Si-H bonds and the rate of HCI degradation also shows a fractional time exponent (n~0.5), the mechanics of which has never been explained. Would the R-D theory offer an explanation of this time-exponent? Indeed, as shown in Ref. [26] that a very simple analysis based on solution of Eqs. (1) and (2), that recognizes the fact that uniform gate stress during NBTI involves 1D diffusion of H, while the localized degradation during HCI involves 2D diffusion of H, can interpret HCI exponents within the classical R-D framework. Moreover, it is generally believed that for continued scaling, one must adopt reduced cross-section transistors (e.g., FINFET, Fully depleted SOI, etc.). It is natural to ask if NBTI degradation in planar transistors (as discussed above) would be modified with reduction is transistor geometry. Since electrostatics is determined by inside Laplace equation for potential (i.e., ε(2(=0, ( is the potential and ε is the dielectric constant) while NIT is dictated by outside Laplace equation for hydrogen concentration (i.e., DH(2NH=0, generalization of (2*)), therefore any device geometry that improves electrostatics must necessarily degrade NBTI time-exponent n. Still, an overall optimization for power-performance is possible, because better electrostatic control allows reduction in supply voltage, which in turn reduces kF in Eq. (3-5). This reduction in kF may easily compensate for enhanced n associated transistors with reduced cross-section, so that the overall performance as well as the reliability are optimized. One may wish to consult Ref. [25] for additional details.

The conclusions reached in this paper are broadly applicable to nitrided and non-nitrided films. Based on extensive measurement and theoretical analysis of NBTI degradation in nitrided films, one we conclude that for moderate nitradation ( ................
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