Photodiodes .edu



Optical Gigabit Ethernet Transceiver

Group 5

ECE 4006

Professors: Dr. Brooke & Dr. Jokerst

March 20, 2003

Project Members:

Melanie Garrick

Barry Mullins

Nihar Patel

Jason Young

Georgia Institute of Technology

College of Engineering

School of Electrical and Computer Engineering

TABLE OF CONTENTS

|ABSTRACT…………………………………………………………………...2 |

|INTRODUCTION……………………………………………….......……….3 |

|GROUP MANAGEMENT………………………………………..…………5 |

|BACKGROUND…………………………………………………..…………6 |

|IEEE 802.3z Standard…………………………………………………6 |

|Maxim Chips…………………………………………………………..9 |

|Photodiodes……………………………………………………………9 |

|VCSELs………………………………………………………………10 |

|OPTICAL LINK BUDGET………………………………………......…….11 |

|PROVIDED RECEIVER BOARD…………………………….…………..15 |

|Issues and Difficulties…………………………………….……….....16 |

|Results…………………………………………….………………….16 |

|DESIGN & LAYOUT……………………………………………………….18 |

|Transceiver Schematics…………………………………………..….18 |

|PCB Layout…………………………………………………..………20 |

|TRANSCEIVER PROTOTYPE……………………………..….………..21 |

|Baseline Receiver Test……………………………………………....22 |

|Baseline Transmitter Test…………………………………………....23 |

|Loopback Test……………………………………………………….24 |

|Issues and Difficulties……………………………………………….24 |

|CONCLUSION………………………………………………………………25 |

|REFERENCES……………………………………………………………….27 |

ABSTRACT

The Gigabit Ethernet provides high-speed capabilities for networks in an age in which swift communication is demanded in today’s society. As communication capabilities approach the speed of light, optical links are beginning to push the limits of communication speed to new heights. This project focuses on the physical level of the Gigabit Ethernet by striving to develop an optical transceiver that meets the requirements of the IEEE 802.3z standard. The four main objectives for this transceiver are that the receiver and transmitter for the transceiver be placed on the same printed circuit board, the receiver and transmitter share the same power supply, maintain an eye-safe power output level from the laser, and the laser on the transmitter and the photodiode on the receiver are no further apart than the distance between the fibers on an Asante duplex module. This paper will provide an introduction to the Gigabit Ethernet, detail the steps made in the design process, and outline the successful results of the first prototype of the design. Special attention is devoted to an optical link budget in this paper because it is the driving force in the organization of the specifications of the chips chosen for the design, and for the choice of parts to be used with the chips. The data contained within this report will serve as a reservoir of information that will serve as a launching pad for progress in the improvement of the design.

INTRODUCTION

In an age in which business is dependent upon instantaneous communication, high network speeds have become increasingly important. Networks have not only had a huge impact on business, but they have also touched the lives of the everyday person. As networks have improved, daily communication between individuals has changed, educational methods have changed, military capabilities have changed, and the manner in which companies operate has been changed. All of these factors have led to a dependence of society upon the networks, and this dependence ever cries for these networks to operate at higher speeds. As this demand has increased, engineers have responded to the challenge, and electrical devices have continually increased in capability while at the same time decreased in size. Today, these devices are beginning to operate at the speed of light. The optical devices developed to enable networks to reach such high speeds have paved the way to the Gigabit Ethernet.

The Gigabit Ethernet began to formulate in 1995 as a technology built upon the Fast Ethernet technology. Gigabit Ethernets operate at speeds over 1 gigabit per second, which is an improvement over the Fast Ethernet technology, which operated at speeds around 100 megabits per second. In order to help facilitate a smooth transition from the Fast Ethernet to the Gigabit Ethernet, IEEE has set industry standards, which define several criteria by which the optical devices developed for the Gigabit Ethernet should adhere. These criteria, known as IEEE 802.3z, have allowed development to follow a path in which higher network speeds can be accomplished without requiring companies to replace large amounts of equipment that they were using previously. This is enabling companies to make a smoother financial upgrade to Gigabit Ethernet technologies.

The Gigabit Ethernet Architecture is broken up into seven layers. These layers can be seen in Figure 1. The focus of this project concerns the Physical layer of the architecture. Within this layer, the concentration of the project concerns the Physical Media Layer (PMD). The overall goal of this project is to build an optical transceiver in accord with the stipulations of the IEEE 802.3z standard. There are also several other objectives that this group desires to meet while pursing the overall goal. These objectives include placement of the receiver and transmitter for the transceiver on the same printed circuit board, use the same power supply for the receiver and transmitter, maintaining eye-safe levels of power output by the laser on the laser, and to maintain a distance between the laser and photodiode no larger than the distance between the fibers on the Asante duplex module.

In Figure 2 below, a general outline of the optical transceiver is shown. The transceiver composes of a transmitter, shown on the left, and a receiver, shown on the right, and the two are connected by a fiber through which light passes.

The laser driver and the two amplifiers were chosen to be Maxim chips, while the specific VCSEL (Vertical Cavity Surface Emitting Laser) and photodiode were chosen by developing an optical link budget. The optical link budget is the driving force behind the attainment of the goals of this project. Developing the link budget organized all the specifications for the Maxim chips, enabled the choice of parts, and paved the way toward beginning a layout.

GROUP MANAGEMENT

This group is composed of four members. The members are Melanie Garrick, Barry Mullins, Nihar Patel, and Jason Young. Melanie Garrick was chosen to be the group leader. Though each member of the group has been instrumental in assisting in each part of the design process, the group believed that it was necessary to place members in charge of specific areas in order to facilitate cohesive progress and to maintain high communication within the group. The main areas that the group decided needed specific leadership include background research, vendor relations, design layout, testing, soldering, website maintenance, and chief editor. Melanie Garrick was chosen to coordinate the design layout, Barry Mullins was chosen to coordinate the soldering and testing, Nihar Patel was chosen to facilitate relations with vendors and to be chief editor, and Jason Young was chosen to lead the background research and to maintain the group website. This organization of the group has enabled the group to make strong progress, deeply involve all group members in each part of the design process, and to enhance communication within the group.

The group’s progress is shown below in Figure 3. The progress is represented in a GANTT chart. It is significant to note that the group is performing according to its

planned progress. The group has managed its time well, and its organization has enabled the project to progress in a timely manner, while also producing successful results.

Another key area to note is the group’s management of its budget. The group has been careful to manage its budget in a manner that will enable itself to be prepared for a second prototype of the design. The budget of money spent is shown in Table 1. It is important to note

that this is a budget of money spent, not of how much it will cost to produce the design. The budget allotted to the group was $350. So far, a total of roughly a third of the budget still remains for a second run through the design process. Other key factors to note is that the board fabrications for the second run will not subtract from this total because it is assumed that those fabrications will occur, so the cost for it has already been subtracted from the total. Also, many extra passives, photodiodes, and VCSELs remain at the group’s disposal for the second prototype.

BACKGROUND

IEEE 802.3z Standard

The IEEE 802.3 Gigabit Ethernet standard was designed to allow for coexistence with the Fast Ethernet protocol, which runs at a tenth of the speed. Consequently, the standards differ only in their Physical layer (Figure 1). The higher speed Gigabit protocol requires optical fiber for the transmission of data at long distances since normal electrical media will not accommodate such speeds.

The transceiver module will make use of the 802.3 protocol’s specifications for devices using multimode 62.5 μm fiber and shortwave lasers operating at 850 nm. Such a system falls under the 1000Base-SX classification. Particular design specifications relevant to the transmitter can be found below in Table 2 from section 38.3 of the protocol [1].

Note that the signaling speed will be near 1.25 Gbps and the transmitter’s minimum extinction ratio, defined to be the ratio between the high and low signal levels, is set to be 9 dB. The speed of the device will have a significant impact on the module’s design. For instance, to accommodate the required speed the path along which the signal travels will need to be both short and straight. The extinction ratio will be important for determining current and resistor values in the optical link budget.

Certain specifications for the receiver are given in the protocol as well. Table 3 below gives the 1000Base-SX receiver characteristics for an 802.3 compliant device. The signaling speed is naturally the same as in the transmitter specifications. The average receiver power of 0 dBm corresponds to a power of 1 mW. The transmitter will be designed not to exceed the specified eyesafe value of 0.78 mW [3], and thus will not exceed a 1 mW receiver power.

There are several losses associated with the fiber and connectors used to link the transmitter and receiver. The link power budget was of particular interest in the design of the module. This value specifies the optical attenuation that the fiber imposes on the signal between the transmitter and the receiver.

In order to determine the quality of the signal being transmitted, an eye mask is outlined. This mask defines the area that must be jitter-free inside the eye diagram for the transmitter to be considered effective. It is given in section 38.5 of the 802.3 protocol and is shown below. This mask will be used as a standard for determining whether a transmitted signal carries an adequate shape with acceptable jitter levels.

Maxim Chips

There are several chips used to develop the transceiver. For the transmitter, a laser driver was needed in order to drive the laser that would send an optical signal that represented the data being sent over a fiber. The chip used to perform this task is the MAXIM 3287. This chip is generally used in applications for Gigabit Ethernet optical transmitters, fiber channel optical transmitters, and ATM LAN optical transmitters. In this case, the MAX3287 was used to drive a VCSEL to transmit optical signals. Though it is discussed in more detail in the optical link budget, the electrical characteristics of this chip were used to determine the range of modulation currents for the laser.

The receiver required two chips. The first chip is a transimpedance amplifier (TIA). In this case the MAXIM 3266 was used. The TIA is used to amplify the electrical signal created by the photodiode. This current created by the photodiode is converted to a voltage by the TIA, and the TIA also helps to ensure that only a low amount of noise passes into the circuit. Also, the TIA provides small input impedance into the circuit of about 600 (. The output voltage of the TIA is typically no larger than about 30 mV.

The TIA feeds into a limiting amplifier. The limiting amplifier used for this receiver is a MAXIM 3264. This amplifier is used to raise the TIA output, which is no greater than 30 mV to a voltage greater than 100 mV. As this is done, the analog signal from the TIA is converted into digital current mode logic.

A deeper explanation of how the electrical characteristics of each of the chips affect the design of the transceiver is located in the optical link budget. However, data sheets providing all this data may be viewed via the group website.

Photodiodes

Photodetectors detect optical signals and convert them into electrical signals. Photodiodes (PD), the most common photodetection devices are used to convert signals from VCSELs (Vertical Cavity Surface Emitting Lasers) to useful electrical signals. The important properties of the photodiodes that need to be considered are responsivity (A/W), aperture size, and capacitance. The responsivity is the measure of a detector's effectiveness in producing an electrical signal. Aperture size is the active area of the photodiode where it can capture an optical signal. Capacitance is related to the response time of the PD. Higher responsivity, higher aperture size, and low capacitance are preferred for our application. Aperture size and capacitance are proportional to each other; therefore increasing one will increase the other. The typical range of capacitance acceptable for 1 GHz applications is 1-2 pF; anything greater will increase the time constant and lower the bandwidth and therefore make the device unusable.

There are two types of photodiodes available: connectorized and unconnectorized. Connectorized devices are pre-aligned to receive maximum optical signal. Connectorized devices are more likely to give an accurate output but they cost about three times more than unconnectorized devices and this makes a significant difference when trying to mass-produce. In unconnectorized photodiodes, the fiber has to be manually aligned with the active area of the photodiode, which is usually very small to keep the capacitance small. In this project we will be testing our design with both connectorized and unconnectorized PDs and comparing the results. Below are the characteristics of both kinds of PDs that we chose to use in our design based on properties, cost, and availability.

VCSELs

The main component for operation of the transmitter is the vertical cavity surface emitting laser, or VCSEL. The current from the Maxim laser driver drives the VCSEL to produce an output of light into an optical fiber, therefore converting an electrical signal into an optical signal. VCSELs are chosen in place of more commonly used edge-emitting lasers because of their low cost, high performance advantages. Some of the advantages include the following: “low threshold currents, surface-normal emission and nearly identical to the photodetector geometry give easy alignment and packaging, circular and low divergence output beams eliminate the need for corrective optics, passive versus active fiber alignment, combined with high fiber-coupling efficiency, low-cost potential because the devices are completed and tested at the wafer level, lower temperature-sensitivity compared to edge-emitting laser diodes, high transmission speed with low power consumption” [8].

This project is generally concerned with slope efficiency and threshold current to best decide which VCSEL to implement. Beam divergence is not taken into consideration because only connectorized VCSELs will be utilized. The VCSEL chosen for use in this project is the Honeywell HFE4384-522 because it has a relatively high slope efficiency and low threshold current and is available with common cathode, which is the configuration of the transmitter layout. The slope efficiency is the ratio from the output power to the input current measured in units of mW/mA. The threshold current of the VCSEL is the current required to turn the laser on and is measured in units of mA. The data and calculations used to determine the selection of this laser can be found in the Optical Link Budget Section. For the second run of the design, a more aggressive approach will be taken and a cheaper VCSEL will be selected.

OPTICAL LINK BUDGET

In order to obtain the correct range of current entering the transimpedance amplifier, which is at most 10 (A to 1 mA [2], a number of steps had to be taken. First, the values of the currents through Rbias and Rmod were calculated to maintain an oscillating laser power between Peyesafe and P0. Next, the power delivered from the laser to the photodiode was calculated taking the optical fiber attenuation into consideration. Finally, the photodiode’s responsivity converted the power delivered to the photodiode into the current that is delivered to the transimpedance amplifier. This process can be viewed in the diagram of Figure 2. In order to select the proper passive values contained in the schematics in Figures 11 and 13, an optical link budget was constructed. Selection of the passive elements required knowledge of the currents and power delivered to each component. Finding the equations for the currents was made possible by the following graph:

From the graph in Figure 5, the following equations are discovered algebraically:

[pic] (Eq. 1)

[pic] (Eq. 2)

[pic] (Eq. 3)

All values of Imod are shown as Imod,peak-to-peak with units of mA. ( is defined as the slope efficiency with units of mW/mA. rE is the extinction ratio, which is the ratio of the power of a logical “1” to the power of a logical “0.” By finding the extinction ratio in the IEEE standard to be 9 dB [1], the following equation was deciphered:

[pic] (Eq. 4)

where Peyesafe is equal to a logical “1” and P0 is equal to a logical “0.” Peyesafe was found to 0.78 mW [3]. Since the values for Peyesafe and rE are specified, the value for P0 can easily be found by converting rE from decibels and rearranging Eq. 4:

[pic] (Eq. 5)

Given specifications from various VCSEL vendors for slope efficiency and threshold current, a worst-case scenario was calculated by using a four corners analysis: min/max, max/min, min/min, max/max. For example, the following table is an excerpt from the optical link budget spreadsheet:

Each of the current calculations was done separately. For example, when performing the Itot calculation for the min/max case, the minimum Ithreshold and maximum ( specifications for the particular VCSEL in question were inserted into Eq. 3. After discovering the worst-case current scenario, a worst-case resistance scenario needed to be calculated. Based on the schematics from Figure 11, Rbias was calculated using simple circuit analysis, resulting in the following equation:

[pic] (Eq. 6)

The equation to obtain Rmod was found in the Maxim Data Sheet for the laser driver, MAXIM 3287, and reduced by assuming RTC to be open [9]:

[pic] (Eq. 7)

It was decided that since the worst-case scenario values for the resistances represented a considerably large range, the total passive component should be represented by a resistor and potentiometer connected in series. This would allow for more control during the testing section of the procedure.

To be certain that a sufficient current was being transmitted from the photodiode into the transimpedance amplifier, an examination of the power into the photodiode was necessary. Because the cable attenuation is known to be –7.5 dB from the IEEE Standard [1], the following formula enables the solution for the power delivered to the photodiode:

[pic] (Eq. 8)

Finally, the calculation to obtain the current delivered to the transimpedance amplifier can be made. Because the power delivered to the photodiode is known and the responsivity of each individual photodiode is provided by specifications, the following equation results in the current delivered to the transimpedance amplifier:

[pic] (Eq. 9)

where ( is the responsivity of the photodiode with units of A/W.

Given specifications for various vendors found in Table 5, the following is an excerpt from the table that was constructed to easily compare different photodiodes to determine which best met the criteria:

Based on these calculations, a spreadsheet was designed to easily compare different

VCSEL and photodiode products. The selection of the VCSEL was based on the knowledge that Itot had a specific range of 5 to 15 mA [10] and Imod had a specific range of 2 mA to 30 mA [9]. The complete optical link budget can be found on Group 5’s website.

PROVIDED RECEIVER BOARD

A pre-fabricated receiver board, schematics, and all needed components for assembly were provided. The purpose of this exercise was to familiarize the group with layout, implementation, soldering, and testing. Also the outputs of different bit streams with attenuated signals were examined. Below are the provided schematics, layout and assembly of the receiver board. All of the group members participated in soldering and in testing of the receiver board.

Issues and Difficulties

Initially, the board was not tested with the attenuator because it was not available in the lab. Since the attenuator was not available the group thought the testing was finished and therefore we found it imperative to probe the board and check voltages at different nodes. One of our group members accidentally dragged a piece of wire across one side of the transimpedance amplifier (TIA) and the eye disappeared from the scope. We hypothesized that all of the pins on that side were briefly shorted and burned the chip; but we did not bother replacing the chip since we had already attained our eye diagrams. About a month later, when the attenuator arrived, we had a chance to test our hypothesis and replaced the TIA. To our surprise that was the only part damaged in the accident and then eye reappeared and data was taken with attenuated signals.

Results

The pattern generator was used to produce different bit streams such as PRBS7 and K28.5. These patterns are the most common patterns used in testing gigabit Ethernet devices. PRBS7 is the most stringent test pattern among all and it is also used to judge the marketability of the transceivers. The other test patterns such as D21.5, K28.7, and K28.5 reflect the traffic that the transceiver would normally encounter. These patterns were then attenuated from 0dB to 60dB with 10dB intervals. Figure 9 displays eye diagrams for PRBS7 bit stream.

An eye diagram is used to judge the integrity of the device. A good eye diagram (open eye) indicates there is low signal-to-noise ratio. A bad eye diagram (closed or no eye) indicates that the signal has lot of noise and it cannot distinguish between ones and zeros. The eye diagram for 10dB looks better than 0dB, and then it starts getting worse as the attenuation increases. At 40 dB the eye diagram suddenly has more jitter and at 50 dB and higher eye is not visible at all, only noise is present. The results of attenuated K28.5 are provided in Figure 10 below.

The same observations are made in K28.5 bit stream as in PRBS7. The reason that there was more jitter at 40dB and no discernable signal at 50dB could be that we might have affected the performance of rest of the circuits when we shorted the TIA pins. Also since it took about a month to test the receiver with the attenuator the solder joints might have developed small cracks in them and degraded the performance of the circuit. The eye diagrams of rest of the attenuations are provided in the group website along with results of K28.7 bit stream.

DESIGN AND LAYOUT

Transceiver Schematics

The transmitter schematic shown in Figure 11 is essentially the schematic provided in the MAXIM 3287 Laser Driver Evaluation Board with the feedback loop and MOSFET removed [9].

The capacitors from +5V to ground serve as low-pass filters for the chip power. The 50 kΩ potentiometer sets the modulation current for the VCSEL. It is in series with a 4 kΩ resistor that ensures an acceptable maximum modulation current for the VCSEL. Similarly, the 2 kΩ potentiometer is in series with a 200 Ω resistor that serves the same purpose for the VCSEL’s drive current. R26 was chosen to be 25 Ω so that it would approximately match the resistance seen by the combination of the VCSEL, which typically has resistance between 18 and 40 Ω, and the laser bias resistors. The VCSEL is connected in a common cathode arrangement. All resistor values that were not specified in the data sheets were calculated using formulas that can be found in the optical link budget.

The VCC signal will be filtered through a power filter before connecting to the transmitter. This power filter can be seen in Figure 12. This filter is useful in decreasing cross talk that could occur if both the receiver and transmitter were simply connected to the same power line. It was determined that for our application the 10 μF capacitors were unnecessary since they filter out frequencies that are of little concern.

The receiver schematic is nearly identical to that of the provided test receiver board, with the exception that the optical receiver has an optical input in the form of a photodiode as shown in Figure 13.

As with the transmitter, the capacitors are used for filtering and decoupling. Also, the VCC connections come from a filtered power supply. The filter is the same as that used in the transmitter. However, the TIA has its own power supply filter (Figure 14) that is to be placed in series with the other filter before entering pin 1.

PCB Layout

When implementing a high-speed system such as the optical gigabit Ethernet transceiver, it becomes especially important to place the signal paths in such a way as to reduce ringing and cross talk issues. Lower frequency, low sensitivity paths such as the chip output power lines require less care to route. Sensitive, high frequency paths such as the TIA input require the greatest care. Chip input power traces operate at low frequency, but are relatively sensitive, and therefore require some care, as well as the outputs from the VCSEL and the limiting amplifier, which are high frequency and relatively insensitive.

Taking greater care with plotting a trace involves several layout issues. First, the path should be parallel to other nearby noisy paths so that cancellation of noise can occur. Second, the paths should be as straight as possible. Sharp bends can cause ringing and reflections that can disrupt the high frequency signals. Lastly, the paths should be as short as possible. These considerations caused us to make certain changes in our layout at different stages in the design. For instance, in the transmitter, at the output of the laser driver the ferrite beads were between the capacitors along which the modulation current travels. To make these paths shorter, the ferrite beads were moved outside the capacitors, which were brought parallel to each other and pushed as close to the pins as possible. This greater parallelism takes advantage of the idea of differential signals in which inverted data traveling along parallel lines will experience the same amount of noise that will be cancelled when the difference of the signals is found. Also, it was suggested that the ground of the transmitter’s R26 be close to the ground of the VCSEL. We moved the resistor accordingly and placed a pad where a ferrite bead could be placed as a filter between the grounds if needed.

Another method used to reduce cross talk was the splitting of the ground plane. Hopefully, this will help isolate high frequency signals in their respective board segments. We placed a small ground trace between the split planes so that low frequency signals could pass. Also, we put a pad for a ferrite bead that could span the planes and act as a filter if needed.

One of the main obstacles in the layout was the size of the potentiometers. We originally ordered very small surface-mount potentiometers that we thought would be relatively easy to move around. We subsequently determined that they would not suit our needs because they were single-turn pots and could not handle enough power. Larger pots were ordered with much bigger surface area, and parts needed to be moved around to accommodate them. The final layout can be seen below in Figure 15.

We placed two transmitter designs on the board. The ground plane to the far left is the receiver. In the middle is a transmitter that we consider to be a “safe” design since it does not use a hole in the ground plane for signal traces as the secondary transmitter in the plane on the far right does. This secondary transmitter was fabricated so that we can observe what effects

these differences have.

TRANSCEIVER PROTOTYPE

The ordered printed circuit board from Express PCB [11] was received on March 10 and work was immediately started on it. It took about two days to solder and recheck the solder joints of all the components on the fab board. We decided to test Lasermate’s RSC-M85A306 connectorized PD first. The assembled transceiver board is shown in Figure 16. The VCSEL should always have a fiber connected to it and the other end of the fiber should be capped even when receiver is being tested, since one power supply is being used and the VCSEL will be on. When the VCSEL is on the emitting light, which is invisible, can cause permanent damage to eyes, therefore the VCSEL should always be capped when not in use. Some initial tests were conducted to test the integrity of receiver and transmitter working independently and also together.

Baseline Receiver Test

To test the receiver the golden SMA connectors are connected to the scope, the PD is connected to the optical terminal labeled TX of the Tektronix GTS1250 pattern generator, and the scope is triggered and clocked by connecting it to the pattern generator. The test setup described is displayed in Figure 17. The results of baseline receiver tests for PRBS7 and K28.5 bit sequences are presented in Figure 18 and the test results from other patterns could be found in the group website.

Baseline Transmitter Test

Before setting up the transmitter the pots should be turned to their maximum setting to

ensure that the current through the VCSEL is small so that it will not blow up. To test the transmitter, the VCSEL is connected to the pattern generator’s optical terminal RX, the golden SMA connectors are connected to the pattern generator’s electrical terminal labeled TX DATA Out, and the scope is triggered and clocked by connecting it to the pattern generator. Also, the scope is connected to electrical terminal RX DATA of the pattern generator. The test setup described above is shown in Figure 19. The pots are then turned down until a good eye diagram appears on the scope, but care should be taken not to get the resistance below the design value. The results of baseline transmitter tests for PRBS7 and K28.5 bit sequences are presented in Figure 20 and the test results from other patterns could be found in the group website.

The loops in the eye diagram could come from crosstalk between receiver and transmitter. Since the transmitter is being tested alone, the power supply filters designed to reduce noise are not in use. The clean signal from the PD of the receiver circuit is not being used; instead the receiver of the pattern generator is being used.

Loopback Test

In this test the receiver and transmitter were tested together. To test the transceiver, the PD and the VCSEL are connected together by an optical fiber. The SMA connectors on transmitter circuit are connected to TX DATA Out electrical terminals of the pattern generator. The SMA connectors on receiver circuit are connected to the scope, and the scope is clocked and triggered by connecting it to the pattern generator. The test setup described is displayed in Figure 21. The results of Loopback tests for PRBS7 and K28.5 bit sequences are presented in Figure 22 and the test results from other patterns could be found in the group website.

The results of the Loopback test are better than when transmitter was tested alone. This could be explained since the PD and the VCSEL are working together; therefore the power filters get the chance to reduce the crosstalk between receiver and transmitter.

Issues and Difficulties

The baseline receiver test went very smoothly and we got good eye diagrams without any problems. However, the baseline transmitter test initially produced only flat line. When the group started debugging by probing to measure voltages and measure resistance by the multimeter, it was found that the pots did not have any resistance. We were confident that the VCSEL was still working since in our design we incorporated series resistance to the pots. When the pots were unsoldered, it was found that the wiper and the pin were shorted. So the pots were rotated and re-soldered. Now the pots actually provided resistance, but we were still getting a flat line on the scope. Further debugging indicated that the VCSEL had five volts on each of its three terminals. This was troublesome and we concluded that we might have blown the laser, so it was also unsoldered. Before soldering the last VCSEL we determined that it was crucial to check the pin designations again. It turned out that we had soldered the VCSEL pins in the wrong holes on the board. After soldering the new VCSEL in the right holes the transmitter was tested again and this time it worked perfectly. For the second run we plan to rotate the VCSEL pad on our layout. Next, the loopback test was performed which like the receiver did not have any problems and good eye diagrams were achieved.

CONCLUSION

As the Gigabit Ethernet is beginning to replace the Fast Ethernet, the importance of developing optical transceivers is growing. This group has set about the task of developing an optical transceiver that operates in the gigabit range, contains a transmitter and receiver on the same board, uses only one power supply, places a photodiode and VCSEL within the distance between the fibers on an Asante duplex module, and maintains eye-safe levels of output from the VCSEL. The group has successfully designed a transceiver that meets most of these criteria. The only uncertainty remains in whether or not the VCSEL maintains an eye-safe level. It is believed that the eye-safe level has been maintained through calculations made in the optical link budget, and plans to keep the input current of the VCSEL under 0.78 mW. However, at this time the group does not have access to equipment that will enable testing of this input current level. The capabilities of the transceiver have been tested through the use of several bit streams. These bit streams include, K27.5, K27.8, D21.5, and PRBS7. The PRBS7 test is the most stringent, while the other tests are more representative of the traffic that a transceiver would encounter on an Ethernet. All of these streams were used in baseline tests for the transmitter and receiver, and in a loopback test which tested them operating together. All tests produced successful eye diagrams. These results show that all goals of the project have been surpassed, other than the testing to ensure that eye-safe levels are maintained by the VCSEL. However, there are several issues that can be addressed in the design stages of the next prototype. It might be possible to slightly improve the operation of the transmitter. Also, the group can now focus on reducing the cost to build the transceiver by experimenting with cheaper parts, and on testing the eye-safe level of the VCSEL. It may also be possible to implement a more aggressive design that would enable the group to develop a smaller transceiver. Due to the hard work of each member of Group 5, successful results have been made in a timely fashion that has enabled the group to now shift from a focus of ensuring that the transceiver will operate successfully to a focus of evolving the design so that it will be far superior to the competition’s transceiver design.

REFERENCES

[1] IEEE 802.3z Standard. Available HTTP:



[2] Maxim 3266, Transimpedence Amplifier Evaluation Kit. Available HTTP:



[3] Laser safety standards, Eyesafe levels. Available HTTP:



[4] Photodiode specifications, Lasermate Group, Inc. Available HTTP:



[5] Photodiode specifications, OSI Fibercomm, Inc. Available HTTP:



[6] Photodiode specifications, Hamamatsu Corporation. Available HTTP:



[7] Photodiode specifications, Optek Technology, Inc. Available HTTP:



[8] VCSEL specifications, Lasermate Group, Inc. Available HTTP:



[9] Maxim 3287, Laser Driver Evaluation Kit. Available HTTP:



[10] HFE4384-522 VCSEL specifications, Honeywell Inc. Available HTTP:



[11] Board Vendor. Express PCB. Available HTTP:



[12] International Engineering Consortium, History of Optical Ethernet. Available HTTP:

[13] CISCO “Gigabit Ethernet Technology Brief,” [Online Document] July 2000, Available HTTP:

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[pic]

Figure 6. Schematics of provided receiver board.

[pic]

Figure 7. Provided receiver board layout.

[pic]

Figure 8. Assembled receiver board.

PRBS7

50 dB

40 dB

50 dB

40 dB

10 dB

0 dB

[pic] [pic]

[pic] [pic]

Figure 10. K28.5 attenuated at 0dB, 10dB, 40dB, and 50dB.

10 dB

0 dB

0 dB

[pic] [pic]

Figure 18. Baseline receiver test eye diagrams for different bit streams.

[pic]

Figure 16. Assembled transceiver board.

[pic]

Figure 17. Receiver test setup.

[pic] [pic]

Figure 20. Baseline transmitter test eye diagrams for different bit streams.

K28.5

Figure 19. Transmitter test setup.

[pic]

Figure 19. Transmitter test setup.

PRBS7

K28.5

[pic]

Table 1. Monetary Budget.

[pic] [pic]

Figure 22. Loopback test eye diagrams for different bit streams.

[pic]

Figure 21. Loopback test setup.

PRBS7

K28.5

[pic] Figure 1. Gigabit Ethernet Architecture.

[pic] Figure 2. Optical Electronic Link.

[pic]

Table 2. 1000Base-SX transmit characteristics. [1]

[pic]

Table 3. 1000Base-SX receive characteristics. [1]

[pic]

Table 4. Worst-case 1000BASE-SX link power budget and penalties. [1]

[pic]

Figure 4. Transmitter eye mask definition. [1]

Figure 9. Baseline Transmitter Test.

[pic]

Figure 11. Transmitter Schematic.

[pic]

Figure 12. Power Supply Filter.

Figure ????. Power supply filter. [????]

[pic]

Figure 13. Receiver Schematic.

[pic]

Figure 14. TIA Power supply filter. [2]

[pic]

Figure 15. Final layout.

|Vendors |Lasermate [4] |OSI Fibercomm [5] |Hamamatsu [6] |Optek [7] |

| |RSC-M85A306 |FCI-125G-010HR |S7912 |OPF480 |

| |MIN |MAX |TYPICAL |MIN |MAX |MIN |MAX |

|Responsivity (A/W) |0.35 |- |0.36 |0.47 |- |0.45 |- |

|Capacitance (pF) |- |1.5 |0.96 |- |0.85 |- |2.0 |

|Aperture Size (um) |120 |250 |200 |*/7tÀÊ/ A |- |

| | | | |C ‡ Ž ³ µ | |

| | | | |Ø Ú ß | |

| | | | |-s•›ÃÄÍòóö| |

| | | | |ý | |

| | | | | | |

| | | | | | |

| | | | |! | |

| | | | |" | |

| | | | |C | |

| | | | |D | |

| | | | |E | |

| | | | |F | |

| | | | |J | |

| | | | |m | |

| | | | |o | |

| | | | |p | |

| | | | |r | |

| | | | |t | |

| | | | |v | |

| | | | |” | |

| | | | |– | |

| | | | |™ | |

| | | | |› | |

| | | | |œ | |

| | | | |¼ | |

| | | | |¾ | |

| | | | |¿ | |

| | | | |À | |

| | | | |È- | |

|Connectorized |Yes |Yes |No |No |

Table 5. Parameters of Chosen Photodiodes.

[pic]

Figure 5. Power vs. Current Graph.

|VCSELs |HFE4384-522 |HFE4084-322 |

| |Min |Max |Min |Max |

|Ith (mA) |1.5 |6 |1.5 |6 |

|Slope Efficiency (mW/mA) |0.06 |0.3 |0.1 |0.4 |

|Laser Voltage |1.6 |2.2 |1.6 |2.2 |

| |Min/Min |Max/Max |Min/Min |Max/Max |

|IMOD (mA) |11.36 |2.27 |6.82 |1.70 |

|IBIAS (mA) |8.82 |7.46 |5.89 |7.10 |

|ITOTAL (mA) calc from Imod/Ibias |14.50 |8.60 |9.30 |7.95 |

|ITOTAL (mA) calc from Ith |14.50 |8.60 |9.30 |7.95 |

|POUT (mW) (eyesafe) |0.78 |0.78 |0.78 |0.78 |

|P0 (mW) |0.10 |0.10 |0.10 |0.10 |

| |Min/Max |Max/Min |Min/Max |Max/Min |

|IMOD (mA) |2.27 |11.36 |1.70 |6.82 |

|IBIAS (mA) |2.96 |13.32 |2.60 |10.39 |

|ITOTAL (mA) calc from Imod/Ibias |4.10 |19.00 |3.45 |13.80 |

|ITOTAL (mA) calc from Ith |4.10 |19.00 |3.45 |13.80 |

|POUT (mW) (eyesafe) |0.78 |0.78 |0.78 |0.78 |

|P0 (mW) |0.10 |0.10 |0.10 |0.10 |

|Extinction Ratio (dB) |9 | | | |

Table 6. Four Corners Calculations.

[pic] Figure 3. GANTT Chart representing project progress.

| |Min |Typ |Max |

|I out of PD (mA) (RSC-M85A306) |0.048547 |- |- |

|I out of PD (mA) (FCI-125G-010HR) |- |0.049934 |- |

|I out of PD (mA) (7912) |0.065192 |- |0.065192 |

|I out of PD (mA) (OPF480) |0.06248 |- |- |

Table 7. Current out of PD Calculations.

[pic] [pic]

[pic] [pic] Figure 9. PRBS-7 attenuated at 0dB, 10dB, 40dB, and 50dB.

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