Department of Electrical and Computer Engineering ...



EE 421 – DIGITAL ELECTRONICSCatalog DataAn introduction to the design, layout, and simulation of digital integrated circuits. MOSFET operation and parasitics.?Digital design fundamentals including the design of digital logic blocks. Credits 3Offered every Fall semesterPREREQUISITES AND/OR COREQUISITESPrerequisite EE 320 or consent of instructorTEXTBOOK(s)Baker, “CMOS Circuit Design, Layout, and Simulation, Third Edition,” Wiley-IEEEWeste and Harris, “CMOS VLSI Design: A Circuits and Systems Perspective,” Addision-WesleyCOORDINATORSDr. Yahia BaghzouzDr. R. Jacob BakerDr. Yingtao JiangDr. Peter StubberudTOPICSIntroduction to digital integrated circuit (IC) design the digital IC design processhistory of IC designintroduction to circuit simulationIntegrated circuit processing layers: the well, metal layers, active, and poly layers layout design rulescross-sectional viewsIntroduction to device physics pn-junctions, Fermi levels, carrier concentrations, electric fields in semiconductorsdiffusion and depletion capacitancesWiring delay and cross-talk RC delays through a well, p- or n-active region, metal layersResistors, capacitors, and MOSFETs layout (sizing and layers used) of resistors, capacitors, and MOSFETstemperature behavior, temperature coefficients (Temp Co)MOSFET operation MOSFET capacitancesthreshold voltageIV characteristics of MOSFETsSPICE modelingoperation and modeling of nanometer devicesModels for digital design effective switching resistanceinput and output capacitancesdelay and transition timesusing the MOSFET as a switchThe inverter DC and switching characteristicslayoutsizing for large capacitive loadsinverter topologies, NMOS-only, inverters with tri-state outputsClocked circuits the transmission gate and its applicationslatches and flip-flopslayout of clocked circuitsDynamic logic gates charge leakage, simulating dynamic circuits, nonoverlapping clock generationclocked CMOS logic, e.g., pre-charge evaluate, domino logic, etc.COURSE OUTCOMES After completing EE 420 students will be able to:1.List the main layers used in the fabrication of a digital integrated circuit. (1.3, 1.4, 1.6, 1.7, 1.8, 1.9, and 1.10) [1,2]2.Sketch the cross-sectional view of a layout (1.6, 1.8, 1.9, 1.10, and 1.11) [1,2]3.Discuss the movement of electrons and holes in pn-junctions and transistors under various operating conditions. (1.1, 1.2, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11) [1,2]4. Calculate delays through semiconductor materials and conducting wires. (1.1, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11) [1,2]5.Describe the operation of MOSFETs using equations and intuitively. (1.1, 1.2, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11) [1,2]6.Design, estimate delays, and determine speed bottlenecks in digital circuits. (1.1, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11) [1,2]7.Layout digital circuits and chips. (1.3, 1.4, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11) [1,2]COMPUTER USAGEStudents use SPICE to create, simulate, and analyze digital integrated circuits. Cadence or Electric VLSI are used to layout the integrated circuits.GRADING25% Midterm25% Homework/Quizzes25% Course Project (more complicated project for graduate credit, that is, ECG 621)25% FinalABET COURSE OUTCOMES1. The appropriate technical knowledge and skills:?1. an ability to apply mathematics through differential and integral calculus,?2. an ability to apply advanced mathematics such as differential equations, linear algebra, 4. an ability to apply knowledge of basic sciences,?7. an ability to apply knowledge of engineering,?8. an ability to design a system, component, or process to meet desired needs within realistic constraints,?9. an ability to identify, formulate, and solve engineering problems,?10.an ability to analyze and design complex electrical and electronic devices,?11.an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice,?UULO COURSE OUTCOMES1. Intellectual Breadth and Lifelong Learning2. Inquiry and Critical Thinking3. Communication4. Global/Multicultural Knowledge and Awareness5. Citizenship and EthicsCOURSE PREPARER AND DATE OF PREPARATIONR. Jacob Baker, Monday, January 15, 2015 ................
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