Electronic Systems Group, EE Dept, IIT Bombay



( List of Topics

( Presentation Schedule

( Abstracts

List of M.Tech. Seminar Topics (November 2002)

 

1) Vinay Savla (02307910) / Supervisor: Prof. A.N. Chandorkar / Topic: "DSP architectures for system design". Abstract, Report (pdf)

2) Sagar P.M. (02307406) / Supervisor: Prof. V. Agarwal / Topic: "Embedded operating systems for real-time applications". Abstract, Report (pdf)

3) Arojit Roychowdhury (02307001) / Supervisor: Prof. P.C. Pandey / Topic: "FIR filter design techniques". Abstract, Report (pdf).

4) Arup Chakraborty (02307015)/ Supervisor: Prof. M.C. Chandorkar: "Hardware configurations for DSP-based real time simulators". Abstract, Report (pdf).

5) S. Bhaktavatsala (02307407) / Supervisor: Prof. V.M. Gadre / Topic: "DSP applications in radar". Abstract, Report (pdf)

6) Kartik Kariya (02307923) / Supervisor: Prof. V.M. Gadre / Topic: “Evolution of DSPs”. Abstract, Report (pdf)

5&6) S. Bhaktavatsala (02307407) & Kartik Kariya (02307923) / Supervisor: Prof. V.M. Gadre / Topic: "A survey of DSP applications". Abstract, Report (pdf)

7) Kotta Manohar (02307428) / Supervisor: Prof. Preeti Rao / Topic: "Single channel enhancement of noisy speech". Abstract, Report (pdf)

8) Vikash Sethia (02307023) / Supervisor: Prof. P.C. Pandey / Topic: "Noise cancellation in headphones". Abstract, Report (pdf)

9) Anil Luthra (02307413) / Supervisor: Prof. P.C. Pandey / Topic: "Impedance glottography". Abstract, Report (pdf)

10) B. Raja Sekhar (02307046) / Supervisor: Prof. P.C. Pandey / Topic: "Universal serial bus". Abstract, Report (pdf)

11) Mohit Kumar (02307026) / Supervisor: Prof. T.S. Rathore / Topic: "Low voltage current mode analog cells". Abstract, Report (pdf)

12) Dayashankar Dubey (02307402) / Supervisor: Prof. T. Anjaneyulu / Topic: "Smart sensors". Abstract, Report (pdf)

 

Electronic Systems Group

EE Dept, IIT Bombay

Presentation Schedule of M.Tech. I Sem. Credit Seminars

Venue: EE Conference Room (opposite EE office).

Presentation time < 15 min.

Discussion / changeover < 10 min.

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Date/time Guide / Examiner / Student / Topic

ANC / DKS / Vinay Savla / DSP architectures

18 / 1400-1415 VA / PCP / Sagar / Embedded operating systems ..

18 / 1425-1440 PCP / VMG / Arojit / FIR filter design

18 / 1450-1505 MCC / VMG / Arup Chakr. / Hw conf. DSP based RT sim.

18 / 1520-1535 VMG / PR / Bhaktavatsala / DSP applications

18 / 1545-1600 VMG / PR / Kartik Karia / DSP applications

18 / 1610-1625 PR / PCP / K. Manohar / Sin. channel enh. noisy speech

18 / 1635-1650 PCP / PR / Vikash S. / Noise cancn in headphones

18 / 1700-1715 PCP / PR / Anil Luthra / Impedance glottography

18 / 1730-1745 PCP / TSR / Rajasekhar / Universal serial bus

18 / 1755-1810 TSR / PCP / Mohit Kumar / LVLC analog cells

28 / 1600-1615 TA / PCP / Dayashankar Dubey / Smart sensors

28 / 1625-1635 PR / PCP / Deepa Jain / Speech compression

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It is required for all the ES I semester students to attend all the presentations on 18th.

S/d PCP (ES Seminar co-ordinator)

To: ES_Faculty

Prof Vivek Agarwal ,

Prof AN Chandorkar ,

Prof T Anjaneyulu ,

Prof Dinesh Sharma ,

Prof SD Agashe ,

Prof LR Subramanyam ,

Prof MC Chandorkar

Prof PC Pandey ,

Prof Preeti Rao ,

Prof R Lal ,

Prof TS Rathore ,

Prof VM Gadre

Electronic Systems Group

EE Dept, IIT Bombay

Abstracts of M.Tech. Credit Seminars (November 2002)

 

1) Vinay Savla (02307910) / Supervisor: Prof. A.N. Chandorkar: "DSP architectures for system design", M Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: In this report we discuss a few issues that are important in a digital signal processor in section 2. These include issues like bus architectures that are most optimum for a DSP, parallelism and pipelining, fixed and floating-point issues, etc. We then see the basic blocks required in any digital signal processor in section 3. The basic computational blocks include multipliers & accumulators (MACs), arithmetic & logic unit (ALUs) and shifters. Other blocks that are required for the proper control of these are program sequencers, data address generators, IO controllers and most important of all memory. In section 4 some issues related to power dissipation are included using an example of FIR filter realization. Report (pdf)

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2) Sagar P.M. (02307406) / Supervisor: Prof. V. Agarwal: "Embedded operating systems for real-time applications", M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: The advent of microprocessors has opened up several product opportunities that simply did not exist earlier. These intelligent processors have invaded and embedded themselves into all fields of our lives be it the kitchen (food processors, microwave ovens), the living rooms (televisions, airconditioners) or the work places (fax machines, pagers, laser printer, credit card readers) etc. As the complexities in the embedded applications increase, use of an operating system brings in lot of advantages. Most embedded systems also have real-time requirements demanding the use of Real time Operating Systems (RTOS) capable of meeting the embedded system requirements. Real-time Operating System allows real-time applications to be designed and expanded easily. The use of an RTOS simplifies the design process by splitting the application code into separate tasks. An RTOS allows one to make better use of the system recourses by providing with valuable services such as semaphores, mailboxes, queues, time delays, time outs…etc. This report looks at the basic concepts of embedded systems, operating systems and specifically at Real Time Operating Systems in order to identify the features one has to look for in an RTOS before it is used in a real-time embedded application. Some of the popular RTOS have been discussed in brief, giving their salient features, which make them suitable for different applications. Report (pdf)

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3) Arojit Roychowdhury (02307001) / Supervisor: Prof. P.C. Pandey: "FIR filter design techniques". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: This report deals with some of the Techniques used to design FIR filters. In the beginning, the windowing method and the frequency sampling methods are discussed in detail with their merits and demerits. Different optimization Techniques involved in FIR filter design are also covered, including Rabiner's method for FIR filter design. These optimization Techniques reduce the error caused by frequency sampling Technique at the non-sampled frequency points. A brief discussion of some Techniques used by filter design packages like Matlab are also included. Report (pdf).

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4) Arup Chakraborty (02307015) / Supervisor: Prof. M.C. Chandorkar: "Hardware configurations for DSP-based real time simulators", M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: This report discusses the hardware interconnection mechanisms of the multiple processors used for real time simulations, Hardware-in-Loop simulation for example. Real-time simulations are required for testing systems under real working conditions. Hardware-in-Loop simulation is an example of a such a simulation, in which the input and output behaviour of a process is simulated in real time and used for testing embedded controllers. Real-time simulations are computationally intensive and often require multiple DSPs. Traditional approaches of tightly coupled and loosely coupled multiprocessing systems are first discussed. Then, a survey of some practical real time multiprocessor systems is presented. The techniques used by these practical systems to improve upon both traditional approaches are also discussed. Report (pdf)

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5) S. Bhaktavatsala (02307407) / Supervisor: Prof. V.M. Gadre: "DSP applications in radar". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: There has been an explosive growth in Digital Signal Processing theory and applications over the years. This seminar report explores the applications of digital signal processing in Radar. A survey on applications in Digital Signal Processing in Radar from a wide variety of areas is carried out. A review is done on basic approaching models and Techniques of signal processing for different parameters and extracting information from the received signal. The various Techniques adopted at different stages of radar to obtain the target's signature, is also briefed. Report (pdf)

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6) Kartik Kariya (02307923) / Supervisor: Prof. V.M. Gadre: “Evolution of DSPs”. M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: DSP algorithms and necessity to do complex computation with strict time and accuracy constraints pioneered to the development in the architecture of digital signal processors. Different low and high end DSPs, which satisfies cost and speed constrains of various applications are available in the market. This report reviews the available DSP processor architecture and their features. There is growing need to design customized DSP core, which suits to particular application. This fact is explained with the case study of DSP architecture designed for handheld devices such as mobile phones. Report (pdf)

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5&6) S. Bhaktavatsala (02307407) & Kartik Kariya (02307923) / Supervisor: Prof. V.M Gadre: "A survey of DSP applications". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: There has been an explosive growth in Digital Signal Processing theory and applications over the years. This seminar report reviews the applications of digital signal processing in wide areas. Representative coverage of applications in wide areas of application is presented. Based on the fundamentals our approach is limited in covering general Techniques. Each of the chapters in this report provides detailed applications under that topic. A thorough survey to the possible extent on applications in Digital Signal Processing from a wide variety of areas is carried out and listed in this report. Undoubtedly there may be many more applications, which might have not covered in this report.

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7) Kotta Manohar (02307428) / Supervisor: Prof. Preeti Rao: "Single channel enhancement of noisy speech". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: The problem of enhancement of speech degraded by additive background noise has received considerable attention over the past decade. The reasons being, its wide range of applications and limitations of the available methods. Among the available single channel enhancement Techniques, the spectral subtraction Technique has been one of the widely adopted methods for suppressing stationary additive background noise. The greatest asset of spectral subtraction lies in its simplicity since all that is required is an estimate of the mean noise power. The basic idea of spectral subtraction is to obtain an estimate of the speech spectral level by subtracting the noise estimation from noisy speech. The spectral subtraction Technique performs well as a pre-processor noise reduction Technique for digital voice processors. In our work we first discuss the need for speech enhancement, its applications and the available different approaches. It is followed by classification of single channel enhancement Techniques and brief overview of each method is given. The basic spectral subtraction method and a modified version that minimizes the shortcomings of the basic method have been discussed in detail. The criteria used for evaluating the performance of a speech enhancement method have been explained and conclusions are drawn on the performance of spectral subtraction method. Finally, the limitations of the present spectral subtraction method have been identified and suggestions for further improvement of the method have been put forward. Report (pdf)

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8) Vikash Sethia (02307023) / Supervisor: Prof. P.C. Pandey: "Noise cancellation in headphones". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: The active noise reducing headphone is probably the most successful application of active control of sound - the Technology of canceling sound with sound. This report presents an outlined Technical review of noise cancellation in headphones. The principles of passive noise attenuation are presented after which active attenuation is introduced showing how the two complement the attenuation performance. Both the analog and digital implementations of the noise cancellation system are described, including a briefing on the possible combination of both into a single system. Report (pdf)

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9) Anil Luthra (02307413) / Supervisor: Prof. P.C. Pandey: "Impedance glottography". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: Impedance Glottography is noninvasive measurement of the time variation of the degree of contact between the vibrating vocal folds during voice production. The aspect of contact being measured is called the vocal fold contact area (VFCA). To measure VFCA, the device used is called impedance glottograph. The device is also called electroglottograph or laryngograph. The principle of operation of device, the waveform obtained, an algorithm for determination of pitch period is discussed. EGG waveform for various voice qualities, drawbacks in EGG and various noises present are described. Concept of multichannel EGG and applications of electroglottography are discussed. Various commercial equipment available are compared alongwith the equipment developed by IIT Bombay. Report (pdf)

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10) B. Raja Sekhar (02307046) / Supervisor: Prof. P.C. Pandey: "Universal serial bus", M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: USB is an interface for communicating external peripherals with an external PC. In this report various interfaces prevalent today and their comparisons with USB are brought out. Different types of USB controllers along with the chips available in market is discussed in detail. The USB hardware and software details along with USB products available in market are presented. The advantages both from user and developer point of view are included. A brief discussion on different data transfers supported by USB and how the peripheral gets enumerated as soon as it is plugged to a port is also included. Report (pdf)

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11) Mohit Kumar (02307026) / Supervisor: Prof. T.S. Rathore: "Low voltage current mode analog cells". M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

 Abstract: This seminar report discusses the low-voltage current-mode analog circuits and their various aspects. The need of high speed, high performance, low power circuits because of the advent of the portable electronic and mobile communication systems and difficulties faced in achieving that in today's scenario are presented. Current mode circuits are the best suited candidates for the above. Their advantages are discussed here and a comparison with the conventional voltage mode circuits has been presented. The principle and the implementation of the most common current mode circuits i.e. the current conveyors, has been described. The basic device level techniques also play important role in the design of smarter and efficient circuits. Some of those techniques have also been discussed here. For illustration of these techniques, low power V-I converter using current mirrors and a low-voltage power efficient operational amplifier cell topology is presented. Report (pdf)

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12) Dayashankar Dubey (02307402) / Supervisor: Prof. T. Anjaneyulu: "Smart sensors" M.Tech. Credit Seminar Report, Electronic Systems Group, EE Dept, IIT Bombay, November 2002.

Abstract: A smart sensor consists of transduction element, signal conditioning electronic and controller/processor that supports some intelligence in a single package. This report discusses general architecture of smart sensor and the usefulness of silicon technology in smart sensor. This report also pays attention to the importance and adoption of smart sensors. In addition to this an effort is made to present the design consideration of smart sensor as per the functions performed. The discussion will conclude with some examples of smart sensor. Report (pdf)

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Electronic Systems Group, EE Dept, IIT Bombay

M.Tech. Credit Seminar Reports, November 2002

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