PMT High Voltage Control Board Specification Control ...
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| |LTR. |ECN |DESCRIPTION |DATE |APPROVED |
| |- |NA |Original release |04/01/23 | |
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|SHEET REVISION STATUS |
|SHEET |1 |
|1 | |16 | |ANTARCTIC ASTRONOMY AND ASTROPHYSICS |
|2 | |17 | |RESEARCH INSTITUTE |
|3 | |18 | |THE UNIVERSITY OF WISCONSIN - MADISON, WISCONSIN |
|4 | |19 | |TITLE |
|5 | |20 | |ICECUBE |
|6 | |21 | |PMT HIGH VOLTAGE CONTROL BOARD |
|7 | |22 | |SPECIFICATION CONTROL DRAWING |
|8 | |23 | |ORIGINATOR |DATE |ENGINEER |
|10 | |25 | |LEVEL 2/LEAD |DATE |PRODUCT ASSURANCE |
|12 | |27 | |FILENAME |PROJECT NO. |
|13 | |28 | |9400-0027-SCD.yymmdd.doc |9000 |
|14 | |29 | |DRAWING NO. |SCALE |SIZE |SHEET |
|15 | |30 | |9400-0027-SCD |NA |A |Page 1 of 35 |
Contents
1 INTRODUCTION 4
1.1 Purpose 4
1.2 Scope 4
1.3 Responsibility and Records 4
1.3.1 Document Responsibility 4
1.3.2 Document and Verification Records 4
1.4 Item’s Function in the IceCube System 5
2 APPLICABLE DOCUMENTS 6
2.1 Project Requirements 6
2.2 Reference Documents 6
2.3 Order of Precedence 6
3 REQUIREMENTS 7
3.1 Item Identification 7
3.1.1 Definition 7
3.1.2 Functional Description 7
3.1.3 Functional External Interfaces 7
3.1.4 Schematic Diagram 8
3.2 Performance Requirements 9
3.2.1 Functional Requirements 9
3.2.2 Electrical Requirements 9
3.2.3 Mechanical Requirements 13
3.2.4 External Interface Requirements 15
3.2.5 Environmental Requirements 26
3.2.6 Storage Requirements [TBD] 26
3.3 Design and Construction Requirements 27
3.3.1 Electrical and Electronic Parts 27
3.3.2 High Voltage Generator 27
3.3.3 Coatings, Platings, and Corrosion Prevention [TBD] 27
3.3.4 Adhesives and Sealants [TBD] 27
3.3.5 Printed Circuit Board 27
3.3.6 Component Placement 28
3.3.7 Restricted Parts, Materials, and Processes 28
3.3.8 Reliability 28
3.3.9 Quality 29
4 VERIFICATION 30
4.1 Responsibility 30
4.2 Special Tests and Examinations 30
4.3 Requirement vs. Verification Cross Reference with Section 3 30
5 PREPARATION FOR DELIVERY 31
5.1 Identification—Part Number and Serial Number 31
5.2 Final Visual Inspection 31
5.3 Packaging and Shipping 31
6 DEFINITIONS 32
6.1 IceCube Acronyms 32
6.2 IceCube Glossary 35
7 APPENDIX 36
Figures
Figure 1 Functional Block Diagram 8
Figure 2 HV Control Board Envelope 13
Figure 3 HV Control Board PCB Dimensions 14
Figure 4 High voltage output cable end preparation requirement 22
Figure 5 Interface Cable Attachment 24
Tables
Table 1 Voltage and Current Specification for Digital Signals 16
Table 2 Timing Specification 17
Table 3 Digital Interface Signals 17
Table 4 Digital Interface Devices 18
Table 5 Interface Signal Multiplexing 18
Table 6 Device Addressing Scheme 18
Table 7 POWER_ON 19
Table 8 HV_DISABLE 19
Table 9 Ribbon Cable Connector Pin Assignment 25
1. INTRODUCTION
1. Purpose
This IceCube Specification Control Drawing (SCD) specifies the performance, fabrication, verification, and production acceptance requirements for the PMT High Voltage Control Board used on the IceCube PMT Modular High Voltage Power Supply.
2. Scope
This Specification Control Drawing shall be applicable to the design, development, integration, verification, production, validation, logistics, field deployment and disposal of the PMT High Voltage Control Board.
3. Responsibility and Records
1. Document Responsibility
The IceCube Project of the Antarctic Astronomy and Astrophysics Research Institute (AAAIR) at the University of Wisconsin – Madison (UW) is responsible for writing and updating these requirements to ensure they are correct, complete and current. UW AAARI Quality Assurance is responsible for ensuring this document and changes to it are properly reviewed, approved and maintained.
2. Document and Verification Records
Records of this document and associated verification and qualification records shall be maintained as follows:
a. The approved and signed original of this document shall be maintained per UW AAARI 9000-0004, Document Management Process.
b. Changes to this document shall be via Engineering Change Notices (ECNs) as described in UW AAARI 9000-0004, Document Management Process.
c. Verification records shall be maintained as described in Section 4 of this document in compliance with UW AAARI 9000-0003, IceCube Quality Plan.
4. Item’s Function in the IceCube System
The IceCube Neutrino Observatory System at the South Pole requires high voltage for one Photomultiplier Tube (PMT) in each of its Digital Optical Module (DOM) sensors. The PMT High Voltage Control Board is one of two subassemblies of the PMT Modular High Voltage (HV) Power Supply. The adjustable-output PMT HV Power Supply creates and supplies approximately 2000 volts maximum anode bias and multiple dynode bias voltages to the PMT inside each DOM sensor. The PMT HV Control Board creates and controls this high voltage in accordance with digital commands from the DOM Main Board. For instance the PMT HV Control Board may adjust its output high voltage to obtain different PMT photon sensitivities. The PMT HV Control Board also measures and reports the value of the output high voltage. The output high voltage is delivered to the PMT HV Base Board where it is applied to the anode for signal extraction and proportionately distributed to the PMT electrodes. There are 5120 Digital Optical Modules in the IceCube system, each containing a PMT HV Control Board in a PMT Modular HV Power Supply. The IceCube system has 4800 DOMs deployed over a kilometer deep in the Antarctic ice with 320 additional DOMs installed on the ice surface, all used for scientific research.
2. APPLICABLE DOCUMENTS
The following documents of the exact issue shown are applicable requirements for this Configuration Item only to the extent they are invoked by specific requirements herein.
1. Project Requirements
a. PMT Modular HV Power Supply Engineering Requirements Document, 9400-0016-ERD
b. PMT HV Generator Source Control Drawing, 9400-0068-SCD (Rev -)
c. PMT HV Base Board Specification Control Drawing, 9400-0028-SCD
d. PMT HV Power Supply Interface Control Document, 9400-0016-ICD
e. PMT HV Control Board Schematic, 9400-0027-SCH (Rev A)
f. PMT HV Control Board Ribbon Cable Assembly Drawing, 9400-0022-DWG (Rev -)
g. PMT HV Control Board Component Envelope Drawing, 5549C104 Rev B, Physical Sciences Lab, University of Wisconsin–Madison (Needs revision. Refer to information in the present document.)
2. Reference Documents
a. JESD8-B, “Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits”, JEDEC Solid State Technology Association, September 1999.
b. IPC-2221, §6.3 Electrical Clearance, “B-4 External Conductors with Permanent Polymer Coating” [TBR]
c. “Book of iButton Standards”, Dallas Semiconductor Corporation, Application Notes Number 937, January, 2002.
d. MIL-HDBK-217F (N1/2)—Parts Stress and Analysis method [TBR]
3. Order of Precedence
a. Conflicts within this document shall be resolved as directed by the IceCube System Engineer in collaboration with the Project Lead responsible for this Design Item.
b. Conflicts between other documents as they relate to or impact this document shall be resolved as directed by the IceCube Project Manager in collaboration with the IceCube System Engineer.
3. REQUIREMENTS
1. Item Identification
1. Definition
The PMT High Voltage Control Board (HV Control Board) is a printed circuit board (PCB) assembly, containing the High Voltage Generator module, power inputs, control logic, output voltage control, and digital interface circuitry, and, together with the PMT HV Base Board, constitutes the PMT Modular High Voltage Power Supply. The HV Control Board is mechanically mounted as a daughter board to the DOM Flasher Board and is electrically connected to the PMT HV Base Board via a high-voltage cable and to the DOM Main Board via a digital interface cable. No electrical connection, including grounds, is present between the HV Control Board and the DOM Flasher Board.
2. Functional Description
The HV Control Board derives all the power from the DOM Main Board and generates a high voltage in the range of approximately 1000 to 2100 VDC and supplies it to the PMT HV Base Board, where the high voltage potential is divided and distributed to the individual electrodes of the PMT (Figure 1). The digital interface circuitry supports the following commands issued by the DOM Main Board:
a. Adjust the HV Generator output voltage
b. Report the measured value of the HV Generator voltage output
c. Report the digital serial number uniquely identifying each individual HV Control Board
d. Respond to power supply power ON/OFF commands
e. Respond to high voltage output ENABLE/DISABLE commands
f. The digital interface circuitry providing the above functions may be either internal or external to the HV Generator either in part or as a whole.
All the power for the HV Generator and the digital interface circuitry is provided by the DOM Main Board.
3. Functional External Interfaces
The HV Control Board has four external functional interfaces:
a. Power input from the DOM Main Board
b. Bidirectional digital control and data from/to the DOM Main Board
c. High voltage output to the PMT HV Base Board
d. Structural mount to the Flasher Board
These interfaces are illustrated in Figure 1.
4. Schematic Diagram
Refer to the IceCube document # 9400-0027-SCH.
[pic]
Figure 1 Functional Block Diagram
2. Performance Requirements
1. Functional Requirements
1. High Voltage Generation
The HV Control Board shall generate an adjustable high voltage output for the PMT HV Base Board, using the power provided by the DOM Main Board.
2. Digital Command Response
The HV Control Board shall respond to the following digital control commands issued by the DOM Main Board:
a. ON/OFF command for switching the primary power of the entire HV Control Board
b. ENABLE/DISABLE command for enabling or disabling the high voltage output
c. Serial DAC code for setting the High Voltage output value
3. Digital Output
The HV Control Board shall provide the following digital output to the DOM Main Board:
a. Serial ADC code for the High Voltage Monitor Output value
b. Serial digital code uniquely identifying the individual HV Control Board
2. Electrical Requirements
1. Input Voltage
1. +5 Volts DC
The HV Control Board shall receive a power input voltage of +5 VDC ±5%.
2. –5 Volts DC
The HV Control Board shall receive a power input voltage of -5 VDC ±5%.
2. Input Current
1. +5 Volts Input Current
The HV Control Board input current for +5 Volt power shall not exceed 70 mA [TBR].
2. –5 Volts Input Current
The HV Control Board input current for -5 Volt power shall not exceed 30 mA [TBR].
3. Input Power
The total input power to the PMT HV Control Board shall not exceed 350 mW [TBR].
4. Internal Grounds
1. Analog Ground
a. The analog signal ground on the HV Control Board shall be referenced by the HV Generator and by the appropriate analog ground pin(s) of the DAC, the ADC, and, if present, the voltage reference device.
b. The shielding case of the HV Generator shall be connected to the analog ground.
c. The analog ground shall be connected to the DOM Main Board interface connector pin(s) designated as DGND at a single point.
2. Digital Ground
Digital Ground and Power Ground shall be one on the PCB and shall refer to the net designated as DGND on the DOM Main Board interface connector.
3. RF Ground
The HV Control Board shall use the Power Ground as the RF ground.
4. Power Ground
Power Ground and Digital Ground shall be one on the PCB and shall refer to the net designated as DGND on the DOM Main Board interface connector.
5. High Voltage Generation
1. Power ON/OFF Transients
The HV output upon power up of the HV Control Board shall be within ±1V [TBR].
2. High Voltage Enable/Disable [TBR]
a. The HV output shall reach within ± 5% of the target value in less than 30 seconds after receiving a HV enable command under a resistive load of 130 MΩ ± 5%.
b. The HV output shall reach below 100V in less than 30 seconds after receiving a HV disable command under a resistive load of 130 MΩ ± 5%.
Note “Disable” means disabling the high voltage generation circuitry, such as the oscillator, while the rest of the HV Control Board is powered.
3. HV Adjustment
1. Voltage Adjustment Range
The HV Control Board high voltage output shall be adjustable over a minimum range of 1000 to 2047 VDC when measured using a resistive load of 130 MΩ ± 5%.
2. Minimum Adjustable Voltage
The low-end of the adjustable high voltage range of the HV Control Board shall be greater than –5 VDC when measured using a resistive load of 130 MΩ ± 5%.
3. Maximum Adjustable Voltage
The high-end of the adjustable high voltage range of the HV Control Board shall be less than 2100 VDC when measured using a resistive load of 130 MΩ ± 5%.
4. Voltage Adjustment Resolution
The HV Control Board shall use a 12-bit resolution DAC for digitally setting the value of the high voltage output.
5. Voltage Adjustment Linearity
The HV Control Board high voltage output and the corresponding digital command code shall have a linear relationship over the specified adjustment voltage range with a slope of 0.5 Volts ± [TBD] Volts per bit when measured using a resistive load of 130 MΩ ± 5%.
4. High Voltage Quality
1. Voltage Stability (Absolute bound around set point)
a. The high voltage output of the HV Control Board shall not deviate from the set point by more than 0.2% over any eight-hour period, once the output value has reached within this range of the set point, under a stable operating temperature.
b. The high voltage output of the HV Control Board shall not change from the set point at a rate any faster than 0.2% per hour.
2. Voltage Ripple (Noise)
The HV Control Board high voltage output ripple voltage, originating from the HV Generator, shall be less than 5 mVpp when measured with a resistive load of 130 MΩ ± 5%.
Note Laboratory measurements show that far greater ripple amplitudes are acceptable in order to meet the requirement for the PMT Modular HV Power Supply, which specifies the ripples to be less than 0.5mVpp when measured at the end of the resistively-terminated pulse-output cable.
6. High Voltage Monitoring
1. Voltage Monitoring Output
The HV Control Board shall allow monitoring of the high voltage output using an ADC and transmit its value to the DOM Main Board as a digital code upon command.
2. Voltage Monitoring ADC Resolution
The HV Control Board shall use a 12-bit resolution ADC for monitoring the value of the high voltage output.
3. Voltage Monitoring Linearity
The HV Control Board high voltage output being monitored and the corresponding digital value shall have a linear relationship in the specified adjustment voltage range with a slope of 0.5 V ± [TBD] Volts per bit when measured using a resistive load of 130 MΩ ± 5%.
4. Voltage Monitoring Accuracy
The HV Control Board high voltage output value that is digitally reported shall be within ±2% [TBR] of the true value.
Note The value is based on a prototype evaluation.
7. Current Sourcing Capability
1. Current Sourcing at Minimum Operating Temperature
The HV Control Board shall provide a DC current sourcing capability of a minimum of 12 nA at the minimum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is varied from zero to the specified minimum current.
2. Current Sourcing at Maximum Operating Temperature
The HV Control Board shall provide a DC current sourcing capability of a minimum of 240 nA at the maximum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is varied from zero to the specified minimum current.
3. Pulsed Current Sourcing [TBR]
The HV Control Board shall provide a current sourcing capability of a minimum of 60 mA for an isolated single 1 μsec square-pulse, at the minimum operating temperature specified herein, as determined by the output voltage changing less than 10V when the current is changed from zero to the specified pulse current during the pulse time. [TBR]
3. Mechanical Requirements
1. Overall Size and Volume Constraints
a. The maximum height of the components on the bottom side of the HV Control Board shall be no greater than 16 mm.
b. The maximum height of the components on the top side of the HV Control Board shall be 22 mm minus the printed circuit board thickness (1.6mm typical).
c. All the components on the HV Control Board shall be wholly contained within the component envelope, defined in Figure 2, except for:
• Interface ribbon cable
• HV output cable
• Stand-offs for mounting the HV Control Board to the next higher assembly.
d. The lateral extent of the HV Control Board, defined by the “Component Side View” in Figure 2, shall be as specified in the next section.
[pic]
Figure 2 HV Control Board Envelope
2. PCB Dimensions
The overall shape of the printed circuit board of the PMT HV Control Board shall be as shown in Figure 3, where the dimensions are for the maximum extent of the board outline, corresponding to the “Component Side View” in Figure 2.
a. The maximum board outline dimensions shall be observed to within ±0.5 mm.
b. The relative locations of the three mounting holes shall be observed to within ±0.5 mm. [TBR]
c. The ribbon connector mounting location, relative to the mounting holes, shall be observed to within ±1 mm.
[pic]
Figure 3 HV Control Board PCB Dimensions
3. Weight
The fully assembled HV Control Board shall weigh no greater than 100 grams [TBR].
Note The actual unit in use (PY3) weighs approximately 85 grams.
4. External Interface Requirements
1. Electric Power
The HV Control Board shall receive all of its electric power from the DOM Main Board through the conductors in the DOM Main Board-to-HV Control Board interface cable.
2. Grounding
1. Digital Signal Grounding
External Digital Signal Grounding shall be via multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board.
2. RF Signal Grounding
External RFI and EMIC Grounding shall be via multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board.
3. Power Grounding
Power Grounding shall be via multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board.
4. High Energy Grounding
External High Energy Grounding shall be via multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board.
5. Safety Grounding
External Safety Grounding shall be via multiple common/shared return conductors in the ribbon cable between the HV Control Board and the DOM Main Board.
3. Analog Signals
The HV Control Board shall have a single analog high-voltage output, defined in Section 3.2.1.
4. Special Discrete Signal
The HV Control Board’s serial number shall be read out by the DOM Main Board using the Dallas 1-Wire protocol from the on-board device, referred to as the IDENT device. The IDENT device signal specification is distinct from that of the digital signals; however, it shall share the digital line MISO with the ADC, as shown in Table 5. See Section 3.2.4.5.7.2 for the IDENT signal specification.
5. Digital Signals
1. Voltage, Current, and Timing
1. Applicable Standard(s)
The logic levels and corresponding voltages between the HV Control Board and the DOM Main Board communications shall comply with the specifications in JESD8-B, “Interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits”, JEDEC Solid State Technology Association, September 1999.
2. Voltage and Current Specification [TBR]
The voltage and current specifications for the digital communication between the HV Control Board and the DOM Main Board shall be as shown in Table 1.
Table 1 Voltage and Current Specification for Digital Signals
|Parameter |Min. |Max. |Units |
|Voltage output from HV Control Board |Logic “High” |2 |3.3 |V |
| |Logic “Low” |-0.3 |0.8 |V |
|Voltage input to HV Control Board |Logic “High” |2.4 |3.6 |V |
| |Logic “Low” |0 |0.4 |V |
|Current out of HV Control Board | |- |10 |μA |
|Current into HV Control Board | |- |2 |mA |
Note 1 The device on the DOM Main Board with which the HV Control Board communicates is a Xilinx CoolRunner II operating with a 3.3V I/O voltage. The device is capable of driving a 3.3V LVTTL input as well (i.e., it can source more than 2 mA into an LVTTL input.)
Note 2 The table summarizes the specifications of JESD8-B, assuming the I/O supply for the CoolRunner II varies over 3.0V to 3.6V and the HV Control Board input sinks a maximum of 2 mA.
Note 3 The voltage and current specifications do not apply to the IDENT signal. For the IDENT signal, the requirements specific to the Dallas 1-Wire protocol shall apply.
3. Timing Specification [TBR]
The digital interface devices on the HV Control Board shall meet the timing specification in Table 2 in sending and receiving digital signals.
Table 2 Timing Specification
|Clock frequency |0.1 - 1 MHz |
|Clock duty ratio |20 – 80 % |
|Rise Time for all logic and clock |0.3 - 9.0 ns |
|Fall Time for all logic and clock |0.8 – 10.5 ns |
Note 1 The timing specification here does not apply to the IDENT signal. The IDENT device operation relies on its unique timing requirements.
Note 2 The rise time / fall time values are from “Cool Runner-II I/O Characteristics”, Xilinx Document No. XAPP382 (v 1.0), November 11, 2002. The value ranges correspond to the load capacitance range of 0 to 100 pF.
Note 3 JESD8-B does not specify timing. A possibly applicable standard for the timing is JEDEC Document No. 13-B, “Standard Specification for Description of ‘B’ Series CMOS Devices”, May 1980; however, the Xilinx datasheet (Note 2) is probably more up-to-date and suites better for the present purpose.
2. Digital Interface Signals
The HV Control Board shall communicate with the DOM Main Board using the digital interface signals identified in Table 3. (“IN” = Input to the HV Control Board.)
Table 3 Digital Interface Signals
|Signal Name |Direction |Description |
|POWER_ON |IN |Board power ON (active high) |
|HV_DISABLE |IN |HV output disable (active high) |
|CS0 |IN |Chip-select bit 0 |
|CS1 |IN |Chip-select bit 1 |
|SCLK |IN |Serial clock |
|MISO |OUT |Master-In-Slave-Out serial data |
|MOSI |IN |Master-Out-Slave-In serial data |
3. Digital Interface Devices
1. On-Board Interface Devices
The serial digital interface devices listed in Table 4 shall be present on the HV Control Board.
Table 4 Digital Interface Devices
|Device |Function |Part number |
|IDENT |Provide board serial number |Dallas Semiconductor (Maxim) DS2401 or equivalent|
|DAC |Digital-to-analog conversion for |Linear Technology LTC1257IS8 or equivalent |
| |HV output adjustment | |
|ADC |Analog-to-digital conversion for |Linear Technology LTC1286IS8 or equivalent |
| |HV output monitor | |
2. Signal Multiplexing
The interface devices shall share the MISO, MOSI, and SCLK signals, as shown in Table 5.
Note The operation of the IDENT device requires the signal on the MISO line to have a rate of logic transitions in the range specified in the Dallas 1-Wire signaling protocol. The device for multiplexing MISO for IDENT and ADC data must, therefore, support both the normal (fast) CMOS transitions and the slow 1-Wire signaling transitions. The use of an analog switch, rather than a logic multiplexer, will accomplish such a requirement.
Table 5 Interface Signal Multiplexing
|Device |MISO |MOSI |SCLK |
|IDENT |data | | |
|DAC | |data |clock |
|ADC |data | |clock |
4. Device Addressing Scheme
The two “chip-select” signals, CS0 and CS1, are used to select a digital function, as shown in Table 6.
Table 6 Device Addressing Scheme
|CS0 |CS1 |Explanation |
|1 |1 |Read from IDENT or write a word to DAC (default ) |
|0 |1 |Update DAC output on falling edge of CS0 |
|1 |0 |Operate ADC while CS1 remains low. |
|0 |0 |(not allowed) |
5. POWER_ON
The HV Control Board’s power shall be controlled by the logic state of POWER_ON as shown in Table 7.
Table 7 POWER_ON
|Logic Level |Function |
|0 |Board power off |
|1 |Board power on |
6. HV_DISABLE
a. The HV Control Board’s HV output shall be disabled or enabled, according to the logic state of HV_DISABLE, as shown in Table 8.
b. The HV_DISABLE shall be remain in logic “0” while POWER_ON is “0” or within 0.5 sec. after POWER_ON becomes “1”.
c. The logic level of HV_DISABLE shall not change more than once per second.
Note The requirements (a) and (b) are due to the specification of the HV Generator.
Table 8 HV_DISABLE
|Logic Level |Function |
|0 |Enable HV output |
|1 |Disable HV output |
7. Board Serial Number—IDENT
1. Required Pull-Up Resistor
The HV Control board shall provide a 5kΩ pull-up resistor (closest value in 5% or better) to +3.3VDC (relative to DGND) for the IDENT device serial signal line.
2. Device Operation
The IDENT device shall communicate with the DOM Main Board, serving as the bus master, according to the Dallas 1-Wire signaling protocol (See “Book of iButton Standards”, Dallas Semiconductor Corporation, Application Notes Number 937, January, 2002.).
8. HV Output Adjustment—DAC
1. Number Format
The DAC shall use a 12-bit unsigned straight binary encoding with the digital value 000 (hex) representing the DAC output of 0 VDC.
2. DAC Device Operation
a. The analog output of the DAC shall be updated by the DOM Main Board in the following sequence:
1) While CS0 = “1” and CS1 = “1”, the 12 data bits are written to the DAC on the rising clock edge starting from MSB, using MOSI and SCLK lines.
2) CS0 is pulled low momentarily. (The DAC output is updated on the falling edge of CS0.)
b. The HV Control Board shall support the following maximum operating speed parameters of the DAC:
1) Maximum serial clock frequency = 1.4 MHz
2) Minimum clock high time = 350 nsec.
3) Minimum set-up time after the data bit is set to the next rising clock edge = 250 nsec.
4) Minimum hold time of the data bit after the rising clock edge = 25 nsec.
5) Minimum wait before CS0 goes low after the last data bit is set = 250 nsec.
6) Minimum duration in which CS0 remains low = 150 nsec.
Note Source: Linear Technology LTC1257 datasheet.
9. HV Output Monitor—ADC
1. Number Format
The digital output code transmitted by the HV Control Board ADC shall be in 12-bit unsigned straight binary with the digital value 000 (hex) representing 0 VDC.
2. ADC Device Operation
a. The operating sequence and timing of the ADC shall be according to 9400-0016-ICD.
b. The analog input to the ADC is read out as a 12-bit digital word by the DOM Main Board in the following sequence:
1) CS1 is pulled low.
2) The SCLK line is made to go from low to high three times.
3) The 12 data bits are read out on the rising edge of the clock, starting from MSB, using SCLK and MISO.
4) CS1 is set high.
c. The HV Control Board shall support the following maximum operating speed parameters of the ADC:
1) Maximum serial clock frequency = 200 kHz
2) Minimum clock high time = 2 μsec.
3) Minimum set-up time for the first rising clock edge after CS1 going low = 2 μsec.
4) Minimum wait after the falling clock edge to the data bit read-out = 250 nsec.
Note Source: Linear Technology LTC1286 datasheet
6. Interconnections
1. High Voltage Output Cable
1. Cable Type
The high voltage output cable or wires shall consist of two parallel, twisted, or coaxial conductors, one having the high voltage potential with respect to the HV Control Board Power Ground, and the other being the high voltage return that is referenced to the same ground.
Note The current design (PY3) employs a custom coaxial medium, specified in detail in the IceCube document #9400-0068-SCD (HV Generator source control drawing).
2. Voltage Rating
The high voltage cable or wires shall be rated at 5000 VDC minimum breakdown over all the operational environments and operational life specified herein.
3. Minimum Bending Radius
The high voltage cable or wire shall have a minimum bending radius of less than 25 mm over all the operational environments and operational life specified herein.
Note The custom coaxial cable in use as of PY3 has a minimum bending radius of 24 mm.
4. Cable Termination
The high voltage cable or wires shall be electrically and mechanically terminated inside the High Voltage Generator module.
5. Mechanical Integrity
The high voltage cable or wires shall not degrade when the cable or wires are pulled with a maximum of 5 kg of force in any direction from the surface of the HV Control Board.
6. Cable Length
The high voltage output cable or wires shall be 250 ± 15 mm long measured from the top surface of the HV Control Board PCB to the end of the insulation.
7. Cable Exit Location
The high voltage output cable or wires shall exit at the approximate location specified in Figure 3.
8. Cable End Preparation
The end of the high voltage cable shall be stripped and tinned as shown in Figure 4.
Note The figure applies only to the custom coaxial cable in use as of PY3.
[pic]
Figure 4 High voltage output cable end preparation requirement
2. Digital Interface Cable
1. Cable Specification
The digital interface cable shall be according to the specification in IceCube document #9400-0022-DWG (Rev -):
a. The digital interface cable shall be a 24-conductor, 1-mm-pitch flat IDC ribbon cable with 28 AWG (7/36) wires [7 strands of 0.127-mm-diameter wire].
b. The HV Control Board side of the cable shall have a solderable male connector, and the DOM Main Board side shall have a female connector.
c. Correct length of the cable, connector part numbers, and connector orientations shall be observed according to the specification.
2. Attachment to the HV Control Board
The male-connector-side of the interface cable shall be soldered directly to the HV Control Board at the location specified in Figure 3 and in the orientation shown in Figure 5.
3. Signal Assignment
The signal assignment to the interface cable conductors is as shown in Table 9.
Note The following requirements are being observed:
• The interface cable carries digital signals, ground connections, and power connections.
• Each signal, including power and ground, has at least two conductors allocated for redundancy.
7. Mounting Points
1. Mounting Provisions for Next Higher Assembly
The HV Control Board shall provide holes and clearances for mounting it to the DOM Flasher Board using stainless-steel hexagonal stand-offs. The clearance zones shall be concentric with the mounting holes and have a minimum diameter of 9.5 mm. There shall be no copper foil within this diameter.
2. Mounting Locations
The HV Control Board mounting locations for installation into the next higher assembly shall be as shown in Figure 3.
8. Test Points
Voltage measurement test points shall be provided on the component side of the HV Control Board for measuring all inputs and outputs of the High Voltage Generator (except for the high voltage output, which is to be measured at the end of the output cable).
[pic]
Figure 5 Interface Cable Attachment
Table 9 Ribbon Cable Connector Pin Assignment
|Pin # |Signal Name |Description |
|1 |DGND |Digital and power ground |
|2 |SCLK |Serial clock |
|3 |SCLK |Serial clock |
|4 |MOSI |Master-out-slave-in |
|5 |MOSI |Master-out-slave-in |
|6 |MISO |Master-in-slave-out |
|7 |MISO |Master-in-slave-out |
|8 |DGND |Digital and power ground |
|9 |CS0 |Chip-select bit 0 |
|10 |CS0 |Chip-select bit 0 |
|11 |CS1 |Chip-select bit1 |
|12 |CS1 |Chip-select bit1 |
|13 |POWER_ON |Board enable/disable |
|14 |POWER_ON |Board enable/disable |
|15 |+5V |Main power (+) |
|16 |+5V |Main power (+) |
|17 |DGND |Digital and power ground |
|18 |DGND |Digital and power ground |
|19 |-5V |Main power (-) |
|20 |-5V |Main power (-) |
|21 |DGND |Digital and power ground |
|22 |DGND |Digital and power ground |
|23 |HV_DISABLE |HV disable |
|24 |HV_DISABLE |HV disable |
5. Environmental Requirements
1. Temperature
1. Operating Temperature
The HV Control Board shall meet all performance requirements when operating over an ambient temperature range of –40 °C to +27 °C.
2. Non-Operating Temperature
(Shall be consistent with the DOM-level requirements.)
3. Storage/Transport Temperature
The HV Control Board shall withstand a storage and transport temperature range of –55 °C to +45 °C for a period of [TBD] months without any degradation in performance.
2. Thermal Shock
(Shall be consistent with the DOM-level requirements.)
3. Pressure
1. Operating Pressure
The HV Control Board shall meet all performance requirements while operating at 1 atmosphere in air or while operating inside a pressure vessel with a sustained internal Nitrogen gas atmospheric pressure of 40,000 Pa to 100,000 Pa.
2. Non-Operating and Storage/Transport Pressure
(Shall be consistent with the DOM-level requirements.)
4. Mechanical Shock and Vibration
(Shall be consistent with the DOM-level requirements.)
5. Electromagnetic Interference/Compatibility
(Shall be consistent with the DOM-level requirements.)
6. Humidity
(Shall be consistent with the DOM-level requirements.)
7. Radioactivity
(Shall be consistent with the DOM-level requirements.)
6. Storage Requirements [TBD]
3. Design and Construction Requirements
1. Electrical and Electronic Parts
a. To the extent practical, all electrical and electronic components used for the HV Control Board shall meet the lowest operating temperature of –55(C, as specified by the component manufacturer, where “practical” means that such components are readily available for the operating temperature of –55(C or lower.
b. The vendor of the PMT High Voltage Control Board shall supply IceCube with a list of electrical and electronic components used that do not meet the –55(C or lower operating temperature.
2. High Voltage Generator
The High Voltage Generator, specified in IceCube document # 9400-0068-SCD, shall be a self-contained, metal-shielded, potted module requiring only input power and control signals to deliver high voltage via a pigtail output cable. It shall be designed with wire leads for direct solder to the HV Control Board with its insulated high voltage output lead(s) long enough to reach the HV Base Board when mounted in a DOM.
3. Coatings, Platings, and Corrosion Prevention [TBD]
4. Adhesives and Sealants [TBD]
5. Printed Circuit Board
1. Printed Circuit Board Material
The PMT HV Control Board PCB dielectric board material shall be FR-4 with a nominal thickness of 1.6mm (1/16 inches).
2. Copper Foil Thickness
The PMT HV Control Board PCB shall use the copper foil thickness of 1 oz / ft2 [TBR] for electrical traces and solder pads.
3. Solder Mask
A solder mask shall be applied to both the top and bottom sides of the Printed Circuit Board (PCB) with masked clearance including, but not limited to, the following items:
a. All solder pads
b. Through holes for component pins and leads
c. Test points
d. Designated clear solder pad areas for jumpers, grounding wire, etc.
4. Silk Screen Marking
Silk screen markings shall include, but not be limited to, the following items:
a. Supplier identifier
b. IceCube Project identifier (“IceCube”)
c. Part number and revision number (“HV Control Board”)
d. Component reference designators
e. Connector reference designators with pin #1 marked clearly
f. Test points
g. HV Generator pins
6. Component Placement
There are no restrictions in component placement as long as the component envelope (Figure 2) is observed, except for the following items. (The component side (top side) is defined to be the side facing away from the next higher assembly to which the HV Control Board is mounted.)
a. Digital interface cable shall be mounted from the component side at the designated location and in orientation (3.2.4.6.2.2)
b. High voltage output cable shall exit from the component side at the designated location (3.2.4.6.1.7)
c. Mounting holes locations and clearance areas shall be observed (3.2.4.7)
d. Test points shall be accessible from the component side (3.2.4.8)
7. Restricted Parts, Materials, and Processes
(Shall be consistent with the DOM-level requirements.)
8. Reliability
The HV Control Board shall have a Mean Time To Critical Failure (MTTCF) of greater then [TBD] hours as predicted in accordance with the Parts Stress Analysis method of MIL-HDBK-217F (N1/2) [TBR].
9. Quality
1. Acceptance Inspection and Tests
The supplier shall perform and record in-process and Final Acceptance Inspection and Tests on each HV Control Board using pass/fail criteria to a level adequate to demonstrate that the item was fabricated with the correct materials and processes and the item properly functions at limit and nominal electrical inputs at standard temperature and pressure.
2. Environmental Stress Screening
All units shall pass the ESS test.
a. Units exhibiting statistical anomalies in functional tests after the ESS, but otherwise within specifications, shall fail this test.
b. Manufacturer shall document the ESS test plan.
c. Test data and pertinent record shall be captured on-line (no manual entry) and shall be available for a minimum of 15 years henceforth.
3. Functional Tests
All units shall undergo and pass a functional test suite, defined by IceCube, before and after the ESS.
4. Workmanship
a. The components shall be free from physical or electrical defects upon receipt at the purchaser’s facility.
b. Labeling on the units shall be undamaged and legible upon receipt.
5. Certificate of Conformance
All shipments of the HV Control Boards shall be accompanied by a Certificate of Conformance (C of C), indicating that all units meet the specifications as defined in this document.
4. VERIFICATION
1. Responsibility
2. Special Tests and Examinations
3. Requirement vs. Verification Cross Reference with Section 3
5. PREPARATION FOR DELIVERY
1. Identification—Part Number and Serial Number
The HV Control Board shall be indelibly and legibly marked with part number and serial number, traceable to revision and manufacture date code. Such traceability information shall be made available to IceCube.
2. Final Visual Inspection
All units shall undergo and pass a final visual inspection prior to shipping.
3. Packaging and Shipping
The HV Control Board shall be packaged in ESD-protective packaging and shipped by common carrier. The mode of shipping shall not introduce additional risk of unanticipated accidental damage to the unit.
6. DEFINITIONS
1. IceCube Acronyms
|AAARI |Antarctic Astronomy and Astrophysics Research Institute |
|ADC |Analog-to-Digital Converter |
|ATWD |Analog Transient Waveform Digitizer |
|AWG |American Wire Gauge |
|cm |Centimeter |
|CMOS |Complementary Metal Oxide Semiconductor |
|C of C |Certificate of Conformance |
|CS0 |Chip-select bit 1 |
|CS1 |Chip-select bit 0 |
|DAC |Digital-to-Analog Converter |
|DAQ |Data Acquisition System |
|DC |Direct Current |
|DFL |Dark Freezer Laboratory |
|DGND |Digital Ground |
|DOM |Digital Optical Module |
|DOMMB |Digital Optical Module Main Board |
|ECN |Engineering Change Notice |
|EM |Electromagnetic |
|EMC |Electromagnetic Compatibility |
|EMI |Electromagnetic Interference |
|ERD |Engineering Requirements Document |
|ESD |Electrostatic Discharge |
|ESS |Environmental Stress Screening |
|FAT |Final Acceptance Test |
|HV |High Voltage |
|Hz |Hertz |
|ICD |Interface Control Document |
|ID |Inside Diameter |
|IDC |Insulation Displacement Connector |
|IPC |Institute for Interconnecting and Packaging Electronic Circuits |
|K |Kilo (103) |
|Kg |Kilogram |
|LED |Light-Emitting Diode |
|LSB |Least Significant Bit |
|m |Meter / Milli (10-3) |
|M |Mega (106) |
|mA |Milliampere |
|MKS |Meter-kilogram-second |
|mm |Millimeter |
|MISO |Master-In-Slave-Out |
|MOSI |Master-Out-Slave-In |
|MSB |Most Significant Bit |
|MTTCF |Mean-Time-To-Critical-Failure |
|MTTF |Mean-Time-To-Failure |
|mV |Millivolt |
|mW |Milliwatt |
|n |Nano (10-9) |
|OD |Outside Diameter |
|OM |Optical Module |
|p |Pico (10-12) |
|Pa |Pascal |
|PCB |Printed Circuit Board |
|PE |Photoelectron |
|pF |Pico Farad |
|PMT |Photomultiplier Tube |
|P/N |Part Number |
|PSL |Physical Sciences Laboratory, University of Wisconsin-Madison |
|P/V ratio |Peak-to-valley ratio |
|PY |Project Year |
|RF |Radio Frequency |
|RFI |Radio Frequency Interference |
|s, sec |Second |
|SCD |Source Control Document / Specification Control Document |
|SCLK |Serial Clock |
|SI |Système International d’Unités |
|SMB |Sub-Miniature B |
|SPE |Single Photoelectron |
|STF |Simple Test Framework |
|TBD |To Be Determined |
|TBR |To Be Reviewed |
|UL |Underwriters Laboratory |
|UW |University of Wisconsin |
|V |Volt |
|VDC |Volt DC |
|W |Watt |
2. IceCube Glossary
|Anode |A PMT dynode, the last in the multiplier chain and typically larger than the preceding dynodes, |
| |that collects the final charge pulse. |
|Cathode |The active surface of the photomultiplier from which photoelectrons are initially liberated. |
|Zero |The temperature, in degrees Celsius, at which water changes state from a liquid into a solid. |
7. APPENDIX
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