Quad 2-input NOR gate
74HC02; 74HCT02
Quad 2-input NOR gate
Rev. 9 -- 15 February 2024
Product data sheet
1. General description
The 74HC02; 74HCT02 is a quad 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
? Wide supply voltage range from 2.0 V to 6.0 V ? CMOS low power dissipation ? High noise immunity ? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B ? Input levels:
? For 74HC02: CMOS level ? For 74HCT02: TTL level ? Complies with JEDEC standards: ? JESD8C (2.7 V to 3.6 V) ? JESD7A (2.0 V to 6.0 V) ? ESD protection: ? HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V ? CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V ? Multiple package options ? Specified from -40 ?C to +85 ?C and from -40 ?C to +125 ?C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74HC02D 74HCT02D
-40 ?C to +125 ?C
74HC02PW 74HCT02PW
-40 ?C to +125 ?C
74HC02BQ 74HCT02BQ
-40 ?C to +125 ?C
Name SO14
TSSOP14
DHVQFN14
74HC02BZ 74HCT02BZ
-40 ?C to +125 ?C DHXQFN14
Description
plastic small outline package; 14 leads; body width 3.9 mm
plastic thin shrink small outline package; 14 leads; body width 4.4 mm
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 ? 3 ? 0.85 mm
plastic, leadless dual in-line compatible thermal enhanced extreme thin quad flat package; no leads; 14 terminals; 0.4 mm pitch; body 2 mm ? 2 mm ? 0.48 mm
Version SOT108-1 SOT402-1 SOT762-1
SOT8014-1
Nexperia
4. Functional diagram
2 1A 3 1B
5 2A 6 2B
8 3A 9 3B
11 4A 12 4B
1Y 1 2Y 4 3Y 10 4Y 13
mna216
Fig. 1. Logic symbol
2
1 3
1
5
1 6
4
8
1 9
10
11
1 12
13
001aah084
Fig. 2. IEC logic symbol
5. Pinning information
74HC02; 74HCT02
Quad 2-input NOR gate
A Y
B mna215
Fig. 3. Logic diagram (one gate)
5.1. Pinning
D package SOT108-1 (SO14)
1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7
14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A aaa-035251
BQ package SOT762-1 (DHVQFN14)
1 1Y 14 VCC
terminal 1 index area
1A 2 1B 3 2Y 4 2A 5 2B 6
GND(1)
13 4Y 12 4B 11 4A 10 3Y 9 3B
PW package SOT402-1 (TSSOP14)
1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7
14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A
aaa-035252
BZ package SOT8014-1 (DHXQFN14)
terminal 1 index area
1 1Y 14 VCC
1A 2
13 4Y
1B 3
12 4B
2Y 4 2A 5
GND(1)
11 4A 10 3Y
2B 6
9 3B
GND 7 3A 8
GND 7 3A 8
aaa-035253
aaa-035556
Transparent top view
Transparent top view
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND.
74HC_HCT02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 -- 15 February 2024
? Nexperia B.V. 2024. All rights reserved
2 / 14
Nexperia
74HC02; 74HCT02
Quad 2-input NOR gate
5.2. Pin description
Table 2. Pin description Symbol 1Y, 2Y, 3Y, 4Y 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B GND VCC
Pin 1, 4, 10, 13 2, 5, 8, 11 3, 6, 9,12 7 14
Description data output data input data input ground (0 V) supply voltage
6. Functional description
Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don't care.
Input
nA
nB
L
L
X
H
H
X
Output nY H L L
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC IIK IOK IO ICC IGND Tstg Ptot
supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V
SOT108-1 SOT402-1 SOT762-1
-0.5 [1] [1] -
-50 -65 [2] -
+7 V ?20 mA ?20 mA ?25 mA 50 mA
- mA +150 ?C 500 mW
SOT8016-1
-
250 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 ?C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 ?C. For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 ?C.
74HC_HCT02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 -- 15 February 2024
? Nexperia B.V. 2024. All rights reserved
3 / 14
Nexperia
74HC02; 74HCT02
Quad 2-input NOR gate
8. Recommended operating conditions
Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC VI VO Tamb t/V
supply voltage input voltage output voltage ambient temperature input transition rise and fall rate
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
74HC02
Min Typ Max
2.0 5.0 6.0
0
-
VCC
0
-
VCC
-40
-
+125
-
-
625
-
1.67 139
-
-
83
74HCT02
Unit
Min Typ Max
4.5 5.0 5.5 V
0
-
VCC V
0
-
VCC V
-40
-
+125 ?C
-
-
- ns/V
-
1.67 139 ns/V
-
-
- ns/V
9. Static characteristics
Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 ?C
-40 ?C to +85 ?C -40 ?C to +125 ?C Unit
Min Typ Max Min Max
Min
Max
74HC02
VIH
HIGH-level
VCC = 2.0 V
input voltage VCC = 4.5 V
1.5 1.2 -
1.5
-
1.5
-V
3.15 2.4 - 3.15
-
3.15
-V
VCC = 6.0 V
4.2 3.2 -
4.2
-
4.2
-V
VIL
LOW-level
VCC = 2.0 V
input voltage VCC = 4.5 V
- 0.8 0.5
-
0.5
-
0.5 V
- 2.1 1.35
-
1.35
-
1.35 V
VCC = 6.0 V
- 2.8 1.8
-
1.8
-
1.8 V
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -20 A; VCC = 2.0 V 1.9 2.0 -
1.9
-
1.9
-V
IO = -20 A; VCC = 4.5 V 4.4 4.5 -
4.4
-
4.4
-V
IO = -20 A; VCC = 6.0 V 5.9 6.0 -
5.9
-
5.9
-V
IO = -4.0 mA; VCC = 4.5 V 3.98 4.32 -
3.84
-
3.7
-V
IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 -
5.34
-
5.2
-V
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
-
0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 4.5 V
-
0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 6.0 V
-
0 0.1
-
0.1
-
0.1 V
IO = 4.0 mA; VCC = 4.5 V
- 0.15 0.26
-
0.33
-
0.4 V
IO = 5.2 mA; VCC = 6.0 V
- 0.16 0.26
-
0.33
-
0.4 V
II
input leakage VI = VCC or GND; VCC = 6.0 V -
- ?0.1
-
?1
-
?1 A
current
ICC
supply current VI = VCC or GND; IO = 0 A;
-
- 2.0
-
20
-
40 A
VCC = 6.0 V
CI
input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 -- 15 February 2024
? Nexperia B.V. 2024. All rights reserved
4 / 14
Nexperia
74HC02; 74HCT02
Quad 2-input NOR gate
Symbol Parameter
74HCT02
VIH
HIGH-level
input voltage
VIL
LOW-level
input voltage
VOH
HIGH-level
output voltage
VOL
LOW-level
output voltage
II ICC ICC
input leakage current supply current
additional supply current
CI
input
capacitance
Conditions
25 ?C
-40 ?C to +85 ?C -40 ?C to +125 ?C Unit
Min Typ Max Min Max
Min
Max
VCC = 4.5 V to 5.5 V
2.0 1.6 -
2.0
-
2.0
VCC = 4.5 V to 5.5 V
- 1.2 0.8
-
0.8
-
VI = VIH or VIL; VCC = 4.5 V
IO = -20 A
4.4 4.5 -
4.4
-
4.4
IO = -4.0 mA
3.98 4.32 - 3.84
-
3.7
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
0 0.1
-
0.1
-
IO = 5.2 mA
- 0.15 0.26
-
0.33
-
VI = VCC or GND; VCC = 5.5 V -
- ?0.1
-
?1
-
VI = VCC or GND; IO = 0 A;
-
- 2.0
-
20
-
VCC = 5.5 V
per input pin;
- 150 540
-
675
-
VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V
- 3.5 -
-
-
-
-V 0.8 V
-V -V 0.1 V 0.4 V ?1 A 40 A 735 A
- pF
10. Dynamic characteristics
Table 7. Dynamic characteristics GND = 0 V; CL = 50 pF; for test circuit see Fig. 5.
Symbol Parameter
Conditions
25 ?C
-40 ?C to +85 ?C -40 ?C to +125 ?C Unit
Min Typ Max Min Max Min Max
74HC02
tpd
propagation
nA, nB to nY; see Fig. 4 [1]
delay
VCC = 2.0 V
- 25 90
-
115
-
135 ns
VCC = 4.5 V
- 9 18
-
23
-
27 ns
VCC = 5.0 V; CL = 15 pF
-7-
-
-
-
- ns
VCC = 6.0 V
- 7 15
-
20
-
23 ns
tt
transition time see Fig. 4
[2]
VCC = 2.0 V
- 19 75
-
95
-
110 ns
VCC = 4.5 V
- 7 15
-
19
-
22 ns
VCC = 6.0 V
- 6 13
-
16
-
19 ns
CPD
power dissipation per package;
capacitance
VI = GND to VCC
[3] - 22 -
-
-
-
- pF
74HC_HCT02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 -- 15 February 2024
? Nexperia B.V. 2024. All rights reserved
5 / 14
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