16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers



DG406B, DG407B

Vishay Siliconix

16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers

DESCRIPTION

The DG406B is a 16-channel single-ended analog multiplexer designed to connect one of sixteen inputs to a common output as determined by a 4-bit binary address. The DG407B selects one of eight differential inputs to a common differential output. Break-before-make switching action protects against momentary shorting of inputs.

An on channel conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails. An enable (EN) function allows the user to reset the multiplexer/demultiplexer to all switches off for stacking several devices. All control inputs, address (Ax) and enable (EN) are TTL compatible over the full specified operating temperature range.

Applications for the DG406B, DG407B include high speed data acquisition, audio signal switching and routing, ATE systems, and avionics. High performance and low power dissipation make them ideal for battery operated and remote instrumentation applications.

Designed in the 44 V silicon-gate CMOS process, the absolute maximum voltage rating is extended to 44 V, allowing operation with ? 20 V supplies. Additionally single (12 V) supply operation is allowed. An epitaxial layer prevents latchup.

FEATURES

? Low on-resistance - RDS(on): 45 ? Low charge injection - Q: 11 pC ? Fast transition time - tTRANS: 115 ns ? Low power: 0.2 mW

Available Available

? Single supply capability

? Material categorization: For definitions of compliance please see doc?99912

Note

* This datasheet provides information about parts that are

RoHS-compliant and/or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant.

Please see the information/tables in this datasheet for details.

BENEFITS

? Higher accuracy ? Reduced glitching ? Improved data throughput ? Reduced power consumption ? Increased ruggedness ? Wide supply ranges: ? 5 V to ? 20 V

APPLICATIONS

? Data acquisition systems ? Audio signal routing ? Medical instrumentation ? ATE systems ? Battery powered systems ? High-rel systems ? Single supply systems

FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

DG406B

Dual-In-Line and SOIC Wide-Body

DG407B

Dual-In-Line and SOIC Wide-Body

V+ 1 NC 2 NC 3 S16 4 S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11 GND 12 NC 13 A3 14

Decoders/Drivers

28 D 27 V26 S8 25 S7 24 S6 23 S5 22 S4 21 S3 20 S2 19 S1 18 EN 17 A0 16 A1 15 A2

V+ 1 Db 2 NC 3 S8b 4 S7b 5 S6b 6 S5b 7 S4b 8 S3b 9 S2b 10 S1b 11 GND 12 NC 13 NC 14

Decoders/Drivers

28 Da 27 V26 S8a 25 S7a 24 S6a 23 S5a 22 S4a 21 S3a 20 S2a 19 S1a 18 EN 17 A0 16 A1 15 A2

Top View

Top View

S13-2513-Rev. D, 09-Dec-13

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Document Number: 72552

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FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

DG406B

PLCC and LCC

DG407B

DG406B, DG407B

Vishay Siliconix

PLCC and LCC

S 8a

V-

Da

V+

Db

NC

S 8b

S8

V-

D

V+

NC

NC

S 16

4 3 2 1 28 27 26

4 3 2 1 28 27 26

S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11

Decoders/Drivers 12 13 14 15 16 17 18

25 S7 24 S6 23 S5 22 S4 21 S3 20 S2 19 S1

S7b 5 S6b 6 S5b 7 S4b 8 S3b 9 S2b 10 S1b 11

Decoders/Drivers 12 13 14 15 16 17 18

25 S7a 24 S6a 23 S5a 22 S4a 21 S3a 20 S2a 19 S1a

EN

A0

A1

A2

NC

NC

GND

EN

A0

A1

A2

A3

NC

GND

Top View

Top View

TRUTH TABLE (DG406B)

A3

A2

A1

A0

X

X

X

X

0

0

0

0

0

0

0

1

0

0

1

0

0

0

1

1

0

1

0

0

0

1

0

1

0

1

1

0

0

1

1

1

1

0

0

0

1

0

0

1

1

0

1

0

1

0

1

1

1

1

0

0

1

1

0

1

1

1

1

0

1

1

1

1

EN ON SWITCH

0

None

1

1

1

2

1

3

1

4

1

5

1

6

1

7

1

8

1

9

1

10

1

11

1

12

1

13

1

14

1

15

1

16

TRUTH TABLE (DG407B)

A2

A1

A0

EN

ON SWITCH

X

X

X

0

None

0

0

0

1

1

0

0

1

1

2

0

1

0

1

3

0

1

1

1

4

1

0

0

1

5

1

0

1

1

6

1

1

0

1

7

1

1

1

1

8

Notes

? Logic "0" = VAL 0.8 V ? Logic "1" = VAH 2.4 V ? X = Do not care

ORDERING INFORMATION (DG406B)

ORDERING INFORMATION (DG407B)

TEMP. RANGE

PACKAGE

PART NUMBER

TEMP. RANGE

PACKAGE

PART NUMBER

28-Pin Plastic DIP

DG406BDJ, DG406BDJ-E3

28-Pin Plastic DIP

DG407BDJ, DG407BDJ-E3

-40 ?C to 85 ?C

28-Pin PLCC

DG406BDN, DG406BDN-T1-E3

-40 ?C to 85 ?C

28-Pin PLCC

DG407BDN, DG407BDN-T1-E3

28-Pin Widebody SOIC

DG406BDW, DG406BDW-E3, DG406BDW-T1-E3

28-Pin Widebody SOIC

DG407BDW, DG407BDW-E3, DG407BDW-T1-E3

Note ? -T1 indicates Tape and Reel, -E3 indicates Lead-Free and RoHS Compliant, NO -E3 indicates standard Tin/Lead finish.

S13-2513-Rev. D, 09-Dec-13

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Document Number: 72552

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT doc?91000



DG406B, DG407B

Vishay Siliconix

ABSOLUTE MAXIMUM RATINGS

PARAMETER Voltages Referenced to V-

V+ to V-g GND to V-

Digital Inputsa, VS, VD

Current (any terminal)

Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.)

Storage Temperature

28-Pin Plastic DIPc

Power Dissipation (Package)b

28-Pin Plastic PLCCc

28-Pin Widebody SOICf

LIMIT 44 -25

(V-) - 2 to (V+) + 2 or 20 mA, whichever occurs first 30 100 -65 to 150 625 450 450

UNIT

V

mA ?C mW mW mW

Notes

a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 8.3 mW/?C above 75 ?C. d. Derate 16 mW/?C above 75 ?C. e. Derate 18 mW/?C above 75 ?C. f. Derate 6 mW/?C above 75 ?C. g. Also applies when V- = GND.

SPECIFICATIONS

PARAMETER

Analog Switch Analog Signal Rangee Drain-Source On-Resistance RDS(on) Matching Between Channelsg Source Off Leakage Current

SYMBOL

TEST CONDITIONS UNLESS OTHERWISE

SPECIFIED

V+ = 15 V, V- = -15 V VAL = 0.8 V, VAH = 2.4 Vf

VANALOG RDS(on)

VD = ? 10 V, IS = -10 mA sequence each switch on

RDS(on) IS(off)

VD = ? 10 V

VS = ? 10 V, VD = ? 10 V, VEN = 0 V

Drain Off Leakage Current

DG406B DG407B

ID(off)

VD = ? 10 V, VS = ? 10 V,

VEN = 0 V

Drain On Leakage Current

DG406B DG407B

Digital Control Logic High Input Voltage Logic Low Input Voltage Logic High Input Current Logic Low Input Current Logic Input Capacitance

ID(on)

VS = VD = ? 10 V sequence each

switch on

VINH VINL IAH IAL Cin

VA = 2.4 V, 15 V VEN = 0 V, 2.4 V, VA = 0 V

f = 1 MHz

TEMP.b

Full Room

Full Room Room

Full Room

Full Room

Full Room

Full Room

Full

Full Full Full Full Room

TYP.c

45 45 5 -

6

D SUFFIX -40 ?C to 85 ?C

MIN.d

MAX.d

-15

15

-

60

-

74

-

-

-0.5

0.5

-5

5

-1

1

-40

40

-1

1

-20

20

-1

1

-40

40

-1

1

-20

20

2.4

-

-

0.8

-1

1

-1

1

-

-

UNIT V %

nA

V A pF

S13-2513-Rev. D, 09-Dec-13

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Document Number: 72552

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DG406B, DG407B

Vishay Siliconix

SPECIFICATIONS

PARAMETER Dynamic Characteristics

SYMBOL

TEST CONDITIONS UNLESS OTHERWISE

SPECIFIED

V+ = 15 V, V- = -15 V VAL = 0.8 V, VAH = 2.4 Vf

TEMP.b

TYP.c

D SUFFIX -40 ?C to 85 ?C

MIN.d

MAX.d

UNIT

Transition Time

tTRANS

see figure 2

Room

115

-

148

Full

-

-

161

Break-Before-Make Interval Enable Turn-On Time Enable Turn-Off Time

tOPEN tON(EN) tOFF(EN)

see figure 4 see figure 3

Room

39

10

-

Full

-

21

-

ns

Room

75

-

107

Full

-

-

123

Room

50

-

88

Full

-

-

94

Charge Injection Off Isolationh

Q

CL = 1 nF, VS = 0 V RS = 0

Room

11

-

OIRR

VEN = 0 V, RL = 50 , f = 1 MHz

Room

-86

-

-

pC

-

dB

Source Off Capacitance

CS(off)

VEN = 0 V, VS = 0 V, f = 1 MHz

Room

6

-

-

Drain Off Capacitance

Drain On Capacitance

DG407B DG406B DG407B

CD(off) CD(on)

VEN = 0 V, VD = 0 V, f = 1 MHz

Room

108

-

Room

54

-

Room

114

-

Room

57

-

-

-

pF

-

-

Power Supplies

Room

23

-

30

Positive Supply Current

I+

Full

-

-

75

VEN = VA = 0 V or 5 V

Room

-0.02

-1

-

Negative Supply Current

I-

Full

-

-10

-

A

Room

28

-

500

Positive Supply Current

I+

Full

-

-

700

VEN = 2.4 V, VA = 0 V

Room

-0.01

-20

-

Negative Supply Current

I-

Full

-

-20

-

Notes

a. Guaranteed by ? 15 V leakage test, not production tested. b. Room = 25 ?C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 due to proximity to the drain pin.

S13-2513-Rev. D, 09-Dec-13

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Document Number: 72552

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DG406B, DG407B

Vishay Siliconix

SPECIFICATIONS FOR SINGLE SUPPLY

PARAMETER Analog Switch

SYMBOL

TEST CONDITIONS UNLESS OTHERWISE

SPECIFIED

V+ = 15 V, V- = -15 V VAL = 0.8 V, VAH = 2.4 Vf

TEMP.b

TYP.c

D SUFFIX -40 ?C to 85 ?C

MIN.d

MAX.d

UNIT

Analog Signal Rangee

VANALOG

Full

-

0

12

V

Drain-Source On-Resistance

RDS(on) Matching Between Channelsg

RDS(on) RDS(on)

VD = 3 V, IS = -1 mA sequence each switch on

Room Room

78 5

-

100 -

%

Source Off Leakage Currenta

IS(off)

VD = 10 V or 0.5 V,

Room

-

-0.5

0.5

Drain Off Leakage DG406B

Current

DG407B

ID(off)

VS = 0.5 V or 10 V, VEN = 0 V

Room Room

-

-1 -1

1 1

nA

Drain On Leakage DG406B

Current

DG407B

ID(on)

VS = VD = ? 10 V sequence each switch on

Room Room

-

-1 -1

1 1

Dynamic Characteristics

Transition Time Enable Turn-On Time Enable Turn-Off Time Charge Injection Power Supplies

tTRANS

VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V

Room

130

-

tON(EN) VINH = 2.4 V, VINL = 0 V,

Room

93

-

tOFF(EN)

VIN = 5 V

Room

63

-

Q

CL = 1 nF, VS = 6 V RS = 0

Room

9

-

163

125

ns

94

-

pC

Room

13

-

30

Positive Supply Current

I+

VEN = 0 V or 5 V

Full

-

-

75

VA = 0 V or 5 V

Room

-0.01

-20

-

A

Positive Supply Current

I+

Full

-

-20

-

Notes

a. Guaranteed by ? 15 V leakage test, not production tested. b. Room = 25 ?C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. RDS(on) = RDS(on) max. - RDS(on) min. h. Worst case isolation occurs on channel 4 due to proximity to the drain pin.

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

S13-2513-Rev. D, 09-Dec-13

5

Document Number: 72552

For technical questions, contact: analogswitchtechsupport@

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT doc?91000

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