CS152 Computer Architecture and Engineering

Cs 355 Computer Architecture. Cache & Memory Text: Computer Organization & Design, Patterson & Hennessy. Chapter 5-5.3, 5.8-5.9 Objectives: The Student shall be able to: Define memory hierarchy, cache, cache line, cache hit rate, cache miss rate, hit time, miss penalty, write-through, write-buffer, write-back, multilevel caching, l1/primary ... ................
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