PCI Express Motherboard Design Validation Checklist



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PCI ExpressTM Architecture

Motherboard/BIOS Compliance Checklist for the PCI Express Base 1.0a Specification

Revision 1.0

9/14/2004

|REVISION |REVISION HISTORY |DATE |

|1.0RD |Draft release for PCI SIG review |9/8/03 |

|1.0 |Initial release |9/14/04 |

The PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.

Questions regarding this document or membership in the PCI Special Interest Group may be forwarded to:

PCI Special Interest Group

5440 SW Westgate Drive #217

Portland, OR 97221

Phone: 503-291-2569

Fax: 503-297-1090

e-mail Administration@



DISCLAIMER

This document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

All product names are trademarks, registered trademarks, or servicemarks of their respective owners.

Table of Contents

Introduction 4

SYSTEM BOARD PRODUCT INFORMATION 5

MOTHERBOARD PHYSICAL LAYER CHECKLIST 7

MOTHERBOARD ELECTROMECHANICAL CHECKLIST 8

MOTHERBOARD BIOS CHECKLIST 11

MOTHERBOARD SYSTEM ARCHITECTURE CHECKLIST 13

MOTHERBOARD POWER MANAGEMENT CHECKLIST 14

MOTHERBOARD PCB DESIGN RECOMMENDATIONS 15

Introduction

The requirements listed in this document are provided as an aid in designing and validating PCI Express Motherboards. While reasonably complete, the checklist is not comprehensive. This document is only a summary of most of the requirements of the PCI Express Base Specification, Revision 1.0a (PCI Express 1.0a). In the case of discrepancy between this document and PCI Express 1.0a, PCI Express 1.0a governs. PCI Express Motherboards must meet all of the requirements of PCI Express 1.0a whether or not those requirements are repeated in this document.

This checklist is also used as one of the requirements to qualify a PCI product for the Integrator’s List by creating a paper trail of testing for PCI compliance. Motherboard/system vendors, that want their products on the Integrator’s List, complete this checklist and submit it to the SIG or its agent. Note that to be included on the Integrator’s List, motherboards must use PCIe silicon components that are also on the Integrator’s List. The following section provides an area where motherboard/system vendors can indicate which compliant silicon is used in their product.

There is PCI Express functionality that is optional to implement. Assertions for these optional features are included in this checklist. If a product does not implement an optional feature, please write in an ‘NA’ response in either the ‘Yes’ or ‘No’ area.

System Board Product Information

|Date | |

|Vendor Name | |

|Vendor Street Address | |

|Vendor City, State, Zip | |

|Vendor Phone Number | |

|Vendor Contact, Title | |

|Vendor Email address | |

|Product Name | |

|Product Model Number | |

|Product Revision Level | |

|Product Description (form factor, number of addin slots, PCIe | |

|functions integrated on MB) | |

| | |

| | |

| | |

| | |

| | |

Note that as part of the requirement to be considered for the Integrator’s List, in addition to submitting this Motherboard Checklist, vendors must also submit a passing checklist for PCIe components used in their motherboard (the motherboard vendor is responsible to either submit the applicable component checklist, or assure that the applicable component checklist is provided to the PCI-SIG by the component vendor, and provide a detailed reference to that component checklist below). Use area below to indicate which components are used.

PCIe Components on motherboard: (list specific checklist information for applicable components as in table above: i.e., vendor name, vendor contact information, product name, model number, revision level, product description, date of checklist.)

____________________________________________________________

____________________________________________________________

____________________________________________________________

____________________________________________________________

__________________________________________________________

__________________________________________________________

__________________________________________________________

Preferred listing on Integrators List

If this product (or products) qualifies for inclusion on the PCI Express Integrators List, please indicate in the area below how you would like the product(s) listed.

|Company |Product |Identifier |Function |

| | | | |

| | | | |

Motherboard Physical Layer Checklist

PHY.03.01#01 The bit rate clock source for transmitter and receiver must be +/- 300 Yes __ No __

ppm or better.

PHY.03.01#02 If SSC is used, the data rate must be down-spread and modulated Yes __ No __

no more than 0.5% of the nominal data rate frequency.

PHY.03.01#03 If SSC is used, the modulation rate must not exceed the range of 30 Yes __ No __

kHz - 33Khz.

PHY.03.01#05 An AC coupling capacitor in the range of 75-200 nF must be used on Yes __ No __

the transmitter side of each lane of a link.

PHY.03.01#06 The interconnect total capacitance to ground, independent of the AC Yes __ No __

coupling capacitance, must be 3nF or less.

PHY.03.03#04 The time between the jitter median and the maximum deviation from Yes __ No __

the median must be ................
................

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