Basic Idea of Zero Suppression - CERN



Zero Suppression with Scalable Readout System (SRS) and APV25 FE Chip(with DATE and AMORE daq and data analysis software)Steven Lukas Goentoro- August 2015For a more detail documentation, you can check this link Idea of Zero SuppressionThe basic idea of the zero suppression algorithm is to suppress unuseful (empty) data, so the data that has to be transferred to the Data Acquisition PC from the SRS are only the useful one. The selection process is done on the FPGA (Field Programmable Gate Array) of the FEC (Front End Card). The idea of the selection is comparing the integral of the pedestal corrected signal from the given channel with the pedestal variation (sigma) in each channel. The data of the pedestal should be taken earlier, and we have to store that data in FEC, so we can compare the signal measured and the sigma value.Figure SEQ Figure \* ARABIC 1. Zero Suppression Selection Process (Taken from Sorin Martoiu SRS Short User Guide)How to take data using zero suppression firmware?Before taking data using zero suppression algorithm, we have to make sure that the firmware has been installed to the FEC (Front End Card). Afterward, we have to follow the following procedures. In this case, beside using slow control of the SRS, we also use the code from Andre ZibellInitialization1. IP Setting2. ADC Setting3. PLL SettingPedestal runThe pedestal value of each channel can be done in the same way as the ordinary run for non-zero suppression firmwareAPV calibration for zero suppressionThis step is needed to do a calibration for all of the APV in order to be able to acquire data in zero suppression mode. We can use Andre Zibell’s code by typing config_SRS_v7 APZ in the directory which contain the codeSigma and Pedestal value dumping to FECThe value of sigma and pedestal that have been taken earlier will be dumped to the FEC, so they can be the value to compare for the zero suppression algorithm. Before you continue to the next step, you have to check the sigma and pedestal value root file first. Set a proper register for zero suppression runSet a threshold value that will be multiplied by the sigma value of each channel. This value can be set through port 6039, address 0x.14 (see : SRS Slow Control manual)Check the status of the register at FECThis step has to be done in order to check the value of the register inside the FEC, so we can check whether everything is properly configured or not. The following register value address (in port 6039) should be care more (especially if we want to run the zero suppression):1. Address 0x08 - EVBLD_CHENABLE - APV MaskThis address corresponds for the channel enable in data transmission between APV and ADC card through HDMI cable. 2. Address 0x10 - APZ_SYNC_DET This address is read-only address. The value of this address shows us that all of the chips are ready for 40 MHz data acquisition. This value of this address should be the same as the value of address 0x.08 (so, all of the APVs are properly configured). 3. Address 0x11 - APZ_STATUS .This address will tell us whether all of the APVs are ready to take data using zero suppression firmware or not. Here are some examples for two master and two slave chips case.a. If the register show the value of 0x.f0080 , that means all of the APV are ready for zero suppression data acquisitionb. If the register show the value of 0x.f0040, that means all of the APV are not ready for the zero suppression data acquisition.After we finish with all of the preparation procedures, we have to prepare the DATE. The preparation of the DATE basically is the same as the preparation of the DATE for the non zero suppression data acquisitionProblem During Zero Suppression Implementation – The Missing StripsWhen we first tried to take the measurement using zero suppression firmware, there are strips who are missing periodically. It seems that the data from the APV is not transferred correctly to the FEC.The steps of troubleshooting the problem that has been done are the followinga. The first thing that we suspected was the phase (PLL phase). Due to wrong value of PLL phase, we would misread the data that is sent by the APV chip. Unfortunately, when we tried to use all of the phase available (you can look at the value from the SRS Slow Control Manual), those missing strips were still exist, so the problem had to be from somewhere else.b. Bypassing the zero suppression firmware. If we want to disable the zero suppression firmware, we just simply put the value of address 1F, port 6039, with the value of 0x.F. The limitation of bypassing the zero suppression firmware is we can only observe the raw data from one chip at the same time. c. Try to run calibration pulse run and have a look at the raw data. The raw data from the non-zero suppressed format can be observed using old version of Amore (not the one with the capability of reading the zero suppressed data format). The calibration pulse is needed because it is a very well defined signal that we can control easily in which channel this pulse will happen. Beside analyzing through Amore raw data visualization, we also can check the channel using eventDump. The frame of the raw data would give you a hint whether you have a good PLL phase or not. The good PLL phase should give us the good framing (the initial frame signal, the separation signal between one time bin and another time bin are clearly defined).d. Check the connection cable (micro USB to HDMI cable and also the gray cable that connect master and slave chips). Every cables in this run have to be as short as possible and also have to have the same length (specifically for the micro USB to HDMI cable). e. Try to replace the APV chip with a good one. Maybe, one of the channel of the chip is broken or not connectedf. Check at the Amore source file. This was the main problem that cause the missing strips that we experienced earlier. But, at the time you read this report, the Amore source file (SRSAPVEvent.cxx) should be fixed already. However, there may be still some bugs that we have not observed yet. Important Parameters in Zero SuppressionPLL PhasePLL phase is related to the phase of the clock signal that define at what time we will read the data. Trigger DelayA proper trigger delay is needed in order to keep our signal within our data frame. BCLK_FreqBCLK_Freq defines the death time needed between two trigger in order to keep the system not crashed. If you want to keep the system stable, you have to put some death time value. Here are our proposed procedures in order to keep the system stable.1. Take short run (for instance 10000 events). This run is intended to estimate the average number of hit strip per event. You could estimate this value by using the formula that relate the file size (byte), number of time bin, number of hit strip, and number of chips like followingFile?size=288+124+20*No.Chips-1+ No.?Time?Bins+1*2* Total?Strips?Hit?Per?Event*No.?Events This file size formula is divided to two parts, the header and footer’s part (288 Bytes) and the data transfer per event ( the rest of the formula)2. Calculate the byte transfer rate per event. By using the data transfer per event part of the file size formula, you could calculate the byte transfer rate per event3. Calculate the maximum number of event that your system can handle per second by considering the maximum byte per second transferred into your system. Afterward, you can put the minimum value of the BCLK_FreqZero Suppresed DataBy using the zero suppresion firmware, we could take a nice image of the bee like the followingFigure SEQ Figure \* ARABIC 2. Bee image taken using zero suppression firmwareThis image is taken using Fe 55 source and the acquisition rate in when the image was taken was 5 kHz ( 2 master APV, 2 slave APV)Conclusion and Future WorkThe conclusion of this project is We finally manage to take data using zero suppression firmware with DATE and AMORE daq and data analysis software.For the future works, there are several suggestions from me:We should study more about the characteristic of the data taken using good threshold value for different setup and measurement, so we can easily judge whether this threshold value is good or not. We should create program to find of zero suppression parameter (BCLK_Freq, threshold, and trigger delay) easier. We have had a program for the PLL Phase finding, so I think it is better to create similar program for another parameters.Reference1. Sorin Martoiu. “SRS Short User Guide”. Source : . Sorin Martoiu. “SRS Slow Control Manual”. Source : . Mail exchange : Sorin Martoiu, Kondo Gnanvo, Stefano Colafranceschi, Eraldo Oliveri, Andre Zibell ................
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