`timescale 1ns / 1ps
`timescale 1ns / 1ps
/////////////////////////////////////////////////////////////////////////////
//
// Accumulates one color component and prevents overflow
//
/////////////////////////////////////////////////////////////////////////////
module color_component_acc(clk, reset, in, sum);
input clk;
input reset;
input [7:0] in;
output [7:0] sum;
reg [7:0] b, q;
parameter MAX = 8'hFF;
wire [7:0] x;
wire cout;
assign {cout, x} = b + q;
assign sum = cout ? MAX : x;
always @ (posedge clk)
begin
b ................
................
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