Field Programmable Gate Array Testing

Chapter 12

Field Programmable Gate Array Testing

SysEtEe1m41-on-Chip Test Architectures

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Ch. 12 - FPGA Testing - P. 1

What is this chapter about?

Field Programmable Gate Arrays (FPGAs)

Have become a dominant digital implementation media Reconfigurable to implement any digital logic function

Focus on

Testing challenges due to programmability and complexity Overview of testing approaches Test and diagnosis of various resources

New frontiers in FPGA testing

SysEtEe1m41-on-Chip Test Architectures

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Ch. 12 - FPGA Testing - P. 2

FPGA Testing

Overview of FPGAs

Architecture, Configuration, & Testing Problem

Testing Approaches

BIST of Programmable Resources

Logic Resources

? Logic Blocks, I/O Cells, & Specialized Cores ? Diagnosis

Routing Resources

Embedded Processor Based Testing

Concluding Remarks

SysEtEe1m41-on-Chip Test Architectures

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Ch. 12 - FPGA Testing - P. 3

Field Programmable Gate Arrays

Configuration Memory

Programmable Logic Blocks (PLBs)

Programmable Input/Output Cells

Programmable Interconnect

Typical Complexity = 5 million ? 1 billion transistors

SysEtEe1m41-on-Chip Test Architectures

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Ch. 12 - FPGA Testing - P. 4

Basic FPGA Operation

Writing configuration memory (configuration) defines system function

Input/Output Cells

Logic in PLBs

Connections between PLBs & I/O cells

Changing configuration memory data (reconfiguration) changes system function

Can change at anytime

Even while system function is in operation

? Dynamic partial reconfiguration

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SysEtEe1m41-on-Chip Test Architectures

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Ch. 12 - FPGA Testing - P. 5

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