CUSTOMER - NCR



CUSTOMER

RELEASE

NOTES

|Customer: |NCR, Inc |

| |3925 Brookside Parkway |

| |Alpharetta, GA 30022 USA |

| |Phone: (770) 576-6000 |

| |Fax: (770) 754-7790 |

|Product: |Phoenix Technologies SecureCore Tiano 2.1 UEFI Firmware for the Intel Cedar Trail Platform and Cedarview |

| |Processor |

|Platform: |Radiant Systems P1230 – POS system board w/ Intel Atom Cedarview and NM10 (Tiger Point) PCH, ITE IT8783F SIO |

Component Code:

Phoenix Platform Reference Code

|SecureCore Tiano Enhanced, Intel Cedar Trail, Cedarview CPU, Tigerpoint IOH |2.1.0.395 |

|for Cedar Rock NextX CRB Fab1/2 | |

Intel Reference code revision list:

|Cedarview Memory Reference Code |Production version 1.1 |

| |(updated in 2.1.0.395) |

|ACPI Framework BIOS Reference Code |1.0.0 (updated in 2.1.0.395) |

|Cedarview Framework BIOS Reference Code |1.0.0 (updated in 2.1.0.395) |

|Digital Thermal Sensor Reference Code |1.0.0 (updated in 2.1.0.395) |

|Platform Power Management Reference Code |1.0.0 (updated in 2.1.0.395) |

|Intel(R) NM10 Framework Reference Code |Production Version 1.6.0-2 |

|IGD Video BIOS |1059 (RADS v71) |

|Cedarview Processor P-Unit Firmware |Rev.014 (updated in 2.1.0.395) |

Intel CPU Microcode revision list:

|Cedarview-M Signature 30661 Microcode |Rev 10D (M083066110D) |

|Cedarview-D Signature 30661 Microcode |Rev 10D (M043066110D) |

| | |

| | |

Revision History:

A17 (NCR 2.1.0.395 base) – November 4, 2014

Changes:

• Changed chassis type in SMBIOS Type 3 table to correct value of "desktop". – [WIT 698377]

A16 (NCR 2.1.0.395 base) – April 12, 2013

Changes:

• Corrected periodic "Shift-F10" lockup during BIOS POST. – [WIT 678043]

• Sped BIOS POST by about 8 seconds by correcting unsupported PS/2 detection logic. – [WIT 678232]

• Added support for new Winbond W25Q16CV SPI Flash chip. – [WIT 675470]

• Added support for boot from USB drives. – [WIT 675471]

• Integrated latest Realtek Ethernet Option ROM version 2.52. – [WIT 675630]

• Upgraded to latest CPU Microcode revision 'D' to allow connection to Arium debugger. – [WIT 678086]

• Re-enable video following wake from S3. – [WIT 678100]

• Corrected bug where BIOS POST halts following a failed PXE boot. – [WIT 678249]

A15 (Radiant/NCR 2.1.0.395 base) – April 25, 2012

Changes:

• Significantly reduced BIOS update timing using Winflash tool from 4:00 minutes to 1:20 minutes. - [WIT 664272]

A13 (Radiant/NCR 2.1.0.395 base) – February 17, 2012

Changes:

• Added support for Radiant "PXE On Next Boot" functionality. - [WIT 662068]

A12 (Radiant/NCR 2.1.0.395 base) – January 27, 2012

Changes:

• Changed Recovery Buttton logic to match that of existing AMIBIOS platforms. - [WIT 661085/661728]

• Add analog board and RAM temperature reading support to P1230 platform. - [WIT 660444]

• Upgraded VBIOS binary to version 1059.71. – [WIT 661807]

• Removed support for 4MB SPI flash parts. Only 2MB flash parts will be used on P1230. [WIT 661757]

A11 (Calsoft vP1230_2.1.0.395.3) – January 17, 2012

Features/Functional Enhancements:

• Integrated Radiant Recover Button/Boot from Non-primary partion logic

• Removed “IA32” sub-string from BIOS version string

Bug Fixes:

• Fixed EC I/O access bug in SuperIO initialization for analog/RAM temperature reading

A10 (Calsoft vP1230_2.1.0.395.2) – January 13, 2012

Features/Functional Enhancements:

• Viewable BIOS version (Boot screens, Setup, SMBIOS/DMI) now displayed in “Axx” format

• Integrated Radiant v71 VBIOS (IGD 1059)

• Integrate NCR branded spash screen

• Add SuperIO initialization for analog/RAM temperature reading

o IT8783F SIO Environment Controller set to enabled

o SIO EC IO Base Address set to 0x290

o SIO EC temperature sensors (TMPIN3-1) set to Thermal Mode

o SIO EC monitoring engine started

• Change Setup defaults

o Advanced->North Bridge Configuration->Primary Display Selection = “IGD”

o Advanced->North Bridge Configuration->IGD Configuration->”IGD – LCD Panel Type” = “1024 x 768 LVDS Color Panel”

o Advanced->South Bridge Configuration->SB PCI Express Config->PCI Express Port 3 Config->PCI Express Root Port 3 = “Disabled”

o Advanced->South Bridge Configuration->SB PCI Express Config->PCI Express Port 3 Config->PCI Express Root Port 4 = “Disabled”

• Hide Setup fields

o Advanced->North Bridge Configuration->IGD Configuration->”Inverter Connection”

o Advanced->North Bridge Configuration->IGD Configuration->”GMCH BLC Control” 

o Advanced->North Bridge Configuration->IGD Configuration->”IGD Active LFP” 

Bug Fixes:

• Fixed instantaneous resume from S3 sleep state issue

P1230_2.1.0.395.1 – November 7, 2011

Features/Functional Enhancements:

• Upgraded core sources to Phoenix SCT2.1 Cedar Trail 2.1.0.395 release

o This includes newer revisions of Intel reference code and CPU microcode updates (see component revision info above)

• Changed SATA Controller default operating mode from IDE to AHCI

• Removed USB Mass Storage Devices from Boot Order

Bug Fixes:

• Fixed GPE SCI/SMI routing issue resulting in CPU overhead

P1230_2.1.0.388.1 – October 17, 2011

Features/Functional Enhancements:

• Upgraded core sources to Phoenix SCT2.1 Cedar Trail 2.1.0.388 release

o This includes newer revisions of Intel reference code and CPU microcode updates (see component revision info above)

• Integrated newer Realtek 8111 LAN PXE Option ROM (v2.44)

• Integrated Radiant v60 VBIOS (IGD 1050)

• Changed default boot order to place ATA fixed devices before removable (USB, ATAPI) devices

• Changed default Boot Menu hot key from F5 to F8

Bug Fixes:

• PXE boot using 3COM Boot Menu first stage bootloader now functions correctly

• SIO Com port IRQ sharing has been re-enabled

• Bezel LED now turned off in BIOS/DOS as a result of momentary power switch press

P1230_2.1.0.330.3 – September 26, 2011

Features/Functional Enhancements:

• Added Bezel LED functionality

o Set to Blue at BIOS Post start

o Set to Yellow on S1/S3 sleep state

o Set to Black on S5 soft off state

• Added System Status LED functionality

o Set to solid Red on BIOS Post start

o Set to blinking Red on BIOS Post error

o Set to solid Green on OS boot

• Integrated Radiant v54 VBIOS w/ modified device ID for Rev B

• Added COM 4 loopback fix

Known Issues:

• System status LED does not blink red on missing DIMM failure

P1230_2.1.0.330.2 – August 5, 2011

Features/Functional Enhancements:

• Added initialization of NM10 GPIOs as defined in the P1230 BIOS Requirements v1.1 document for the following features:

o System Status LED

o Direct Drive Cash Drawers

o Recovery Button

o LVDS Panel Configuration

o Board Revision

o Reserved Pins

• Added initialization of IT8783F SIO GPIOs as defined in the P1230 BIOS Requirements v1.1 document for the following features:

o Bezel LED

o Note: CF UV LED is not implemented per the spec since this feature will be controlled by the micrcontroller in Rev B hardware.

• Integrated Radiant v41 VBIOS

Known Issues:

• Bezel LED initial values (Blu On, Red/Grn Off) are not being set correctly

P1230_2.1.0.330.1 – July 8, 2011

Features/Functional Enhancements:

• Upgraded core sources to Phoenix SCT2.1 Cedar Trail 2.1.0.330 release

• Integrated Realtek 8111 LAN PXE Option ROM

• Integrated Radiant v36 VBIOS

• Added support for SST25VF016B 2MB SPI Flash device

• Removed unneeded TCG/TPM support code

P1230_2.1.0.300.4 – June 13, 2011

Features/Functional Enhancements:

• Added initialization of SIO COM ports 1-5

• Added MS Windows Oem Activation SLP2.0

Bug Fixes:

• Fixed multiprocessor initialization issue

Known Issues:

• Setup changes do not persist following Save/Exit reset

P1230_2.1.0.300.3 – June 2, 2011

Features/Functional Enhancements:

• Restored B0 stepping microcode updates removed in previous release

o Cedarview-M Signature 30661 Microcode Rev 101 (M0830661101)

o Cedarview-D Signature 30661 Microcode Rev 101 (M0430661101)

• Added new B0 stepping microcode updates

o Cedarview-M Signature 30661 Microcode Rev 102 (M0830661102)

o Cedarview-D Signature 30661 Microcode Rev 102 (M0430661102)

Known Issues:

• Setup changes do not persist following Save/Exit reset

P1230_2.1.0.300.2 – June 2, 2011

Features/Functional Enhancements:

• Changed NM10 multiplexed pins from PIRQ[H:E] to GPIO[5:2] inputs

o Should resolve sluggish Windows problem due to spurious interrupts

• Integrated custom Audio verb table for Realtek ALC262

• Partially implemented DMI string changes

o Implemented

▪ Type 1 System Manufacturer and Product Name strings

▪ Type 2 Base Manufacturer and Product Name strings

▪ Type 11 OEM string “Radiant Systems Product Group POS Platform”

o Not Implemented

▪ Type 0 BIOS Version

▪ Type 11 OEM string “FW00176”

• Removed B0 stepping microcode updates

o To determine if these contribute to missing CPU core issue

Known Issues:

• Setup changes do not persist following Save/Exit reset

• Only one CPU core is visible

P1230_2.1.0.300.1 – June 1, 2011

Features/Functional Enhancements:

• Upgraded core sources to Phoenix SCT2.1 Cedar Trail 2.1.0.300 release

• Integrated Radiant v31 VBIOS

Known Issues:

• Setup changes do not persist following Save/Exit reset

P1230_2.1.0.285.4 – May 26, 2011

Features/Functional Enhancements:

• Changed platform name from “CedarRock” to “P1230”

P1230_2.1.0.285.3 – May 23, 2011

Features/Functional Enhancements:

• Added Winbond W25Q32 Flash support

Bug Fixes/Workarounds:

• Fixed serial port debug messages

• Resolved Post hang by removing ITE SIO support (with the exception of UART 1)

Known Issues:

• Setup changes do not persist following Save/Exit reset

• LVDS panel is not functioning

P1230_2.1.0.285.2 – May 17, 2011

Features/Functional Enhancements:

• Changed CK505 clock settings to customer provided values

• Added serial port debug message

Known Issues:

• Did not boot – hang in Post

• Serial debug messages not working

P1230_2.1.0.285.1 – May 13, 2011

Features/Functional Enhancements:

• Port of Phoenix Cedar Trail Reference UEFI Firmware v2.1.0.285 to customer platform

• Added support for ITE IT8783F Super I/O

• Added support for Flash ROM devices

o Winbond W25X32

o Macronix MX25L3205D

o SST 25VF032B

Known Issues:

• Did not boot – hang in Post

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