OMPUTER - USTC

[Pages:787]COMPUTER ORGANIZATION AND ARCHITECTURE

DESIGNING FOR PERFORMANCE

NINTH EDITION

William Stallings

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Library of Congress Cataloging-in-Publication Data available upon request

10 9 8 7 6 5 4 3 2 1

ISBN 10: 0-13-293633-X ISBN 13: 978-0-13-293633-0

To Tricia (ATS), my loving wife, the kindest

and gentlest person

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CONTENTS

Online Resources xi

Preface xiii

About the Author xxi

Chapter 0

0.1 0.2 0.3 0.4

Reader's and Instructor's Guide 1

Outline of the Book 2 A Roadmap for Readers and Instructors 2 Why Study Computer Organization and Architecture? 3 Internet and Web Resources 5

PART ONE OVERVIEW 6

Chapter 1 Introduction 6

1.1 Organization and Architecture 7 1.2 Structure and Function 8 1.3 Key Terms and Review Questions 14

Chapter 2 Computer Evolution and Performance 15

2.1 A Brief History of Computers 16 2.2 Designing for Performance 37 2.3 Multicore, MICs, and GPGPUs 43 2.4 The Evolution of the Intel x86 Architecture 44 2.5 Embedded Systems and the ARM 45 2.6 Performance Assessment 49 2.7 Recommended Reading 59 2.8 Key Terms, Review Questions, and Problems 60

PART TWO THE COMPUTER SYSTEM 65

Chapter 3 A Top-Level View of Computer Function and Interconnection 65

3.1 Computer Components 66 3.2 Computer Function 68 3.3 Interconnection Structures 84 3.4 Bus Interconnection 85 3.5 Point-To-Point Interconnect 93 3.6 PCI Express 98 3.7 Recommended Reading 108 3.8 Key Terms, Review Questions, and Problems 108

Chapter 4 Cache Memory 112

4.1 Computer Memory System Overview 113 4.2 Cache Memory Principles 120 4.3 Elements of Cache Design 123

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4.4 4.5 4.6 4.7

Chapter 5 5.1 5.2 5.3 5.4 5.5

Chapter 6

6.1 6.2 6.3 6.4 6.5 6.6 6.7

Chapter 7

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10

Chapter 8

8.1 8.2 8.3 8.4 8.5 8.6 8.7

Pentium 4 Cache Organization 141 ARM Cache Organization 144 Recommended Reading 146 Key Terms, Review Questions, and Problems 147 Appendix 4A Performance Characteristics of Two-Level Memories 152

Internal Memory 159 Semiconductor Main Memory 160 Error Correction 170 Advanced DRAM Organization 174 Recommended Reading 180 Key Terms, Review Questions, and Problems 181

External Memory 185

Magnetic Disk 186 RAID 195 Solid State Drives 205 Optical Memory 210 Magnetic Tape 215 Recommended Reading 217 Key Terms, Review Questions, and Problems 218

Input/Output 221

External Devices 223 I/O Modules 226 Programmed I/O 228 Interrupt-Driven I/O 232 Direct Memory Access 240 I/O Channels and Processors 246 The External Interface:Thunderbolt and Infiniband 248 IBM zEnterprise 196 I/O Structure 256 Recommended Reading 260 Key Terms, Review Questions, and Problems 260

Operating System Support 265

Operating System Overview 266 Scheduling 277 Memory Management 283 Pentium Memory Management 294 ARM Memory Management 299 Recommended Reading 304 Key Terms, Review Questions, and Problems 304

PART THREE ARITHMETIC AND LOGIC 309

Chapter 9 Number Systems 309

9.1 The Decimal System 310 9.2 Positional Number Systems 311 9.3 The Binary System 312 9.4 Converting Between Binary and Decimal 312

9.5 Hexadecimal Notation 315 9.6 Recommended Reading 317 9.7 Key Terms and Problems 317

Chapter 10 Computer Arithmetic 319

10.1 The Arithmetic and Logic Unit 320 10.2 Integer Representation 321 10.3 Integer Arithmetic 326 10.4 Floating-Point Representation 341 10.5 Floating-Point Arithmetic 349 10.6 Recommended Reading 358 10.7 Key Terms, Review Questions, and Problems 359

Chapter 11 Digital Logic 364

11.1 Boolean Algebra 365 11.2 Gates 368 11.3 Combinational Circuits 370 11.4 Sequential Circuits 388 11.5 Programmable Logic Devices 397 11.6 Recommended Reading 401 11.7 Key Terms and Problems 401

PART FOUR THE CENTRAL PROCESSING UNIT 405

Chapter 12 Instruction Sets: Characteristics and Functions 405

12.1 Machine Instruction Characteristics 406 12.2 Types of Operands 413 12.3 Intel x86 and ARM Data Types 415 12.4 Types of Operations 418 12.5 Intel x86 and ARM Operation Types 431 12.6 Recommended Reading 441 12.7 Key Terms, Review Questions, and Problems 441

Appendix 12A Little-, Big-, and Bi-Endian 447

Chapter 13 Instruction Sets: Addressing Modes and Formats 451

13.1 Addressing Modes 452 13.2 x86 and ARM Addressing Modes 459 13.3 Instruction Formats 464 13.4 x86 and ARM Instruction Formats 473 13.5 Assembly Language 477 13.6 Recommended Reading 479 13.7 Key Terms, Review Questions, and Problems 479

Chapter 14 Processor Structure and Function 483

14.1 Processor Organization 484 14.2 Register Organization 486 14.3 Instruction Cycle 491 14.4 Instruction Pipelining 495 14.5 The x86 Processor Family 512

CONTENTS vii

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