Diodes - Auburn University
CHAPTER 2
Solving Problems
with SPICE
1 Introduction
Graphical outputs are generated differently depending on the SPICE version used. PSPICE requires the .PROBE statement, while SPICE3 uses the .SAVE statement and its script language. SPICE2 can generate only pseudo graphical output. However, all versions of the SPICE program may use the .PRINT statement, which causes printing of results to an output file in tables of numerical data. The data from the output file can be then read by MATLAB or other plotting programs to generate a graphical output. In this Chapter only the .PRINT statement will be included in SPICE input files. Depending on the SPICE program implementation, additional statements for graphical output can be added, such as .PLOT for SPICE2, .PROBE for PSPICE, and .SAVE for SPICE3. Some SPICE programs such as IsSpice, AIMSpice, or DrSpice do not require specifying graphical output in the input file.
Topics in electronics can be in various ways. The sections in this Chapter follow the sequence used in the textbook by R. C. Jaeger, Microelectronic Circuit Design, McGraw-Hill, New York: 1997. Each section contains examples of applying SPICE to circuit simulation.
2 Solid-State Electronics
Although the SPICE program was designed to analyze electronic circuits it can also be used for calculating and plotting general functions such as characteristics of semiconductor devices or materials. In the case of SPICE3, nonlinear dependent sources with names beginning with the letter B or .SAVE statement can be employed. In the case of PSPICE, the statements .FUNCT and .PARAM can be used. If you are a beginner in circuit analysis with SPICE, you may wish to skip this section because it uses extended features of the SPICE program, and we will artificially change SPICE variables. For example, voltages will be used to represent impurity concentrations and mobilities.
1 Carrier mobility as a function of impurity doping
The carrier mobility in silicon can be approximated by the following equation:
[pic] (2.2.1)
where N is the concentration of impurities (sum of donor and acceptor impurities), E is the electric field, n is the electron concentration, and p is the hole concentration. Other parameters for silicon are specified in the following table:
| |Electron mobility |Hole mobility |
|Nref [cm-3] |6.32(1016 |8.5(1016 |
|a |0.76 |0.72 |
|mmax [cm2/V s] |495 |1330 |
|mmin [cm2/V s] |47.7 |65 |
|Ec [V/cm] |1950 |800 |
|b |1 |2 |
In the case of small electric fields E 50k | |
|CC 3 0 160n ; CC=Vmax/Slew => 160n | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 TABLE {V(3)} = (-12,-12) (12,12) | |
|.ENDS OA741 | |
|VIN 1 0 DC 0 AC 1mV SIN(0 1V 10KHz 0 0 90) | |
|* 90 degree phase shift for symmetrical charging | |
|X1 1 2 4 OA741 | |
|.MODEL RMOD RES R=1K | |
|R 4 2 RMOD 1 | |
|R1 2 0 1k | |
|.TRAN 1u 250u 0 1u UIC | |
|.STEP RES RMOD(R) 3K,15k,3k | |
|.PRINT TRAN V(1) V(4) | |
|.END | |
Fig. 2.12.2. Listing of PSPICE input file for transient analysis of the noninverting amplifier using a model of the mA741 operational amplifier.
A circuit illustrating the transient response of an operational amplifier is shown in Fig. 2.12.2. The input file of this figure represents a model of an nonideal opamp. This model is described by Eqs. 2.12.1 through 2.12.7. The slew rate SR is defined in [V/ms] as the steepest possible slope of the output voltage versus time. This maximum voltage slope corresponds to a maximum current driving the capacitance CC
[pic] (2.12.1)
The time constant RR(CC defines the frequency location of the dominant pole fb, which is also equal to fT divided by the open-loop gain AO.
[pic] (2.12.2)
The open-loop gain AO of the amplifier shown in Fig. 2.12.2 is given by
[pic] (2.12.3)
where GD is the transconductance of the voltage-controlled current source GD and A1 is the voltage gain of the voltage controlled voltage source E1. In order to simplify the model, let us assume GD = 1 A/V and A1 = 1 V/V. This way the open loop gain of the amplifier is set by the value of the resistor RR
[pic] (2.12.4)
Using Eq. (2.12.2), the value of the capacitance CC can be found as
[pic] (2.12.5)
The current limitation IMAX for the voltage controlled current source GD comes directly from Eq. (2.12.1)
[pic] (2.12.6)
The voltage controlled voltage source GC represents the common-mode rejection ratio. Since unity value was assumed for the differential gain GD, the transconductance for the common-mode gain is
[pic] (2.12.7)
The input biasing currents are directly specified by the current sources IB1 and IB2. The voltages which limit the output voltage of the operational amplifier are set in the E1 voltage source using the TABLE keyword. This keyword can be used only in the PSPICE program to set the breakpoints for the piecewise nonlinear characteristic of the controlled sources. In this example, the voltage limits were set to -12 V and +12 V. The same TABLE keyword was used to set the limit IMAX for the GD controlled source in order to model the slew rate. Since the value for the transconductance GD has been assumed to be 1, both IMAX and VMAX, specifying the breakpoints of the GD characteristic, must be the same.
Figure 2.13.3 presents results of the transient analysis for an input frequency equal to 10 kHz and different values of the resistor R. Note the slew-rate limitations. Figure 2.12.4. shows results for the same circuit, but the frequency is lowered to 1 kHz. This time the power supply voltage limitations can be clearly seen.
[pic]
Fig. 2.12.3. Transient analysis of the noninverting amplifier from Fig. 2.12.2 for an input frequency of 10 kHz.
[pic]
Fig. 2.12.4. Transient analysis of the noninverting amplifier from Fig. 2.12.2 for an input frequency of 1 kHz.
3 Frequency characteristics of a nonideal operational amplifier
In this example, the model for the input circuit was simplified. The common-mode input resistance RC (Fig. 2.12.2) is usually very large and can be ignored for most applications. Also in practice the voltage difference between input nodes 1 and 2 is very small, and instead of the average voltage of nodes 1 and 2, obtained with a divided differential input resistance, only one voltage is used to control the common-mode current source GC. In this way, one node and two resistors can be eliminated from the opamp model. Another possible approach for accurate modeling of the common-mode operation is to introduce two voltage-controlled current sources GC1 and GC2 instead of one GC as shown in Fig. 2.12.6. In most cases the simplified model, as shown in Fig. 2.12.5, is adequate, except that during large signal transients, when the input voltages are not the same, the simplified model may lead to errors.
|Spice Input File: OPA3.CIR |Circuit Diagram |
|Non-ideal Operational Amplifier Frequency Response | |
|* for PSPICE only | |
|.SUBCKT OA741 1 2 5 |[pic] |
|* connections: +inp, -inp, out | |
|* uA741 parameters: Slew=0.5MEG, Fmax=1MEG | |
|RIN 1 2 0.5MEG ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|IB1 1 0 0.5uA ; input biasing current | |
|IB2 2 0 0.5uA ; input biasing current | |
|GC 0 3 1 0 0.3m ; CMRR => 0.3m (70dB) | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 80m (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2} | |
|RR 3 0 50k ; RR sets open loop gain => 50k | |
|CC 3 0 160n ; CC=Vmax/Slew => 160n | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|.ENDS OA741 | |
|VIN 1 0 DC 0 AC 1V SIN(0 1V 10KHz 0 0 90) | |
|* 90 degree phase shift for symmetrical charging | |
|X1 1 2 4 OA741 | |
|.MODEL RMOD RES R=1K | |
|R 4 2 RMOD 1 | |
|R1 2 0 100 | |
|.AC DEC 10 10 10MEG | |
|.STEP DEC RES RMOD(R) 100,1MEG,1 | |
|.PRINT AC V(1) V(4) | |
|.END | |
Fig. 2.12.5. Listing of PSPICE input file for frequency response of the non-inverting amplifier using the model of a mA741 operational amplifier.
[pic]
Fig. 2.12.6. Two models of common-mode operation. In both cases the common-mode input resistance is ignored.
Note that in the operational amplifier subcircuit the keyword VALUE was used instead of the keyword TABLE for the nonlinear controlled sources. The results are identical, and both methods are acceptable in PSPICE. The following lines work for PSPICE and are equivalent:
GD 0 3 TABLE {V(1)-V(2)} = (-80m,-80m) (80m,80m) GD 0 3 VALUE {(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2}
E1 4 0 TABLE {V(3)} = (-12,-12) (12,12) E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2}
Unfortunately, the model presented in Figs. 2.12.2 and 2.12.3 for an operational amplifier works only with the PSPICE program. The SPICE3 program requires use of nonlinear controlled sources defined by the first letter B. In the operational amplifier subcircuit description, the two lines marked as bold must be different:
|.SUBCKT OA741 1 2 5 |
|* connections: +inp, -inp, out |
|RIN 1 2 0.5MEG |
|ROUT 4 5 1K |
|IB1 1 0 0.5uA |
|IB2 2 0 0.5uA |
|GC 0 3 1 0 0.3m |
|* Vmax=Imax=Slew/(6.28*Fmax) => 80m (gm=1) |
|BD 0 3 I=(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2 |
|RR 3 0 50k |
|CC 3 0 160n |
|* Rail voltages => -12V and +12V |
|B1 4 0 V=(abs(V(3)+12)-abs(V(3)-12))/2 |
|.ENDS |
[pic]
Fig. 2.12.7. Frequency characteristics of the noninverting amplifier from Fig. 2.12.2 for various values of resistor R.
In the above examples, the mA741 operational amplifier model was used. More recent amplifier designs offer improved parameters: higher gain, higher input resistance, and higher slew rate. The described model also works well for other operational amplifiers, but the element values must be changed. TABLE 2.12.1 shows values of parameters for models of other operational amplifiers.
|Table 2.12.1. Model parameters of various opamps |
| |uA741 |LF155 |LF156 |LF157 |LM101 |LM118 |
|RIN |0.5MEG |1E12 |1E12 |E12 |2 MEG |50 MEG |
|ROUT |1k |1k |1k |1k |1k |1k |
|IB1, IB2 |500nA |30pA |30pA |30pA |150nA |250nA |
|CMRR |300u |10u |10u |10u |30u |100u |
|RR (gain) |50k |200k |200k |200k |120k |50k |
|CC (1/wmax) |160nF |65nF |32nF |8nF |16nF |10nF |
|Imax = Vmax (CC*SR) |80m |320m |400m |400m |80m |500m |
|rail voltages ( ( Vsup) |-12, +12 |-12, +12 |-12, +12 |-12, +12 |-12, +12 |-12, +12 |
4 Second-order low-pass filter
|Spice Input File: OPA4.CIR |Circuit Diagram |
|Second order low-pass filter | |
|.SUBCKT LF155 1 2 5 |[pic] |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|GC 0 3 1 0 10U ; CMRR => 10u (100dB) | |
|RR 3 0 200k ; RR sets open loop gain => 200k | |
|CC 3 0 65n ; CC=Vmax/Slew => 65n | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 0.4 (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2} | |
|* BD 0 3 I=(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2 | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|* B1 4 0 V=(abs(V(3)+12)-abs(V(3)-12))/2 | |
|.ENDS LF155 | |
|VIN 1 0 DC 0 AC 1V | |
|X1 3 4 4 LF155 | |
|.PARAM Q = 1, wo=6.26k, R=10K | |
|R1 1 2 {R} | |
|R2 2 3 {R} | |
|C1 2 4 {2*Q/(wo*R)} | |
|C2 3 0 {1/(2*Q*wo*R)} | |
|RL 4 0 1K | |
|.AC DEC 50 100 10k | |
|.STEP PARAM Q LIST 0.3 0.7 1 3 10 | |
|.PRINT AC V(4) | |
|.END | |
Fig. 2.12.8. Listing of PSPICE input file for frequency response of the second-order low-pass filter using the LF155 operational amplifier.
The circuit of Fig. 2.12.8 is known as a low-pass Sallen-Key circuit. For low frequencies it has a unity gain. The Q factor for the circuit is set by choosing the proper ratio of capacitors C1 and C2: [pic]. The cutoff frequency depends on the time constant [pic]
[pic]
Fig. 2.12.9. Frequency response of the second order low-pass filter from Fig. 2.12.8 using the LF155 operational amplifier.
5 Second-order band-pass filter
|Spice Input File: OPA5.CIR |Circuit Diagram |
|Second-order band-pass filter | |
|.SUBCKT LF156 1 2 5 |[pic] |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|GC 0 3 1 0 10U ; CMRR => 10u (100dB) | |
|RR 3 0 200k ; RR sets open loop gain => 200k | |
|CC 3 0 32n ; CC=Vmax/Slew => 32n | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 0.4 (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2} | |
|* BD 0 3 I=(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2 | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|* B1 4 0 V=(abs(V(3)+12)-abs(V(3)-12))/2 | |
|.ENDS LF156 | |
|VIN 1 0 DC 0 AC 1V | |
|X1 0 3 4 LF156 | |
|.PARAM Q = 1, wo=62.8k, R=1k | |
|R1 1 2 {R} | |
|R2 3 4 {R*4*Q*Q} | |
|C1 2 3 {1/(2*Q*R*wo)} | |
|C2 2 4 {1/(2*Q*R*wo)} | |
|RL 4 0 10K | |
|.AC DEC 50 1k 100k | |
|.STEP PARAM Q LIST 0.25 0.5 1 2 5 10 | |
|.PRINT AC V(4) | |
|.END | |
Fig. 2.12.10. Listing of PSPICE input file for frequency response of the second-order band-pass filter using the LF156 operational amplifier.
The circuit of Fig. 2.12.10 is known as the band-pass Delyiannis-Friend circuit. Capacitances C1 and C2 should be the same, and the Q factor for the circuit is set by choosing proper ratio of resistors R2 and R1: [pic]. The cutoff frequency depends on the time constant [pic]. Results of simulation are shown in Fig. 2.12.11.
[pic]
Fig. 2.12.11. Frequency response of the second-order band-pass filter from Fig. 2.12.10. using the LF156 operational amplifier.
6 High-precision diode circuit
|Spice Input File: OPA6.CIR |Circuit Diagram |
|High precision diode circuit | |
|.SUBCKT LF157 1 2 5 |[pic] |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|GC 0 3 1 0 10U ; CMRR => 10u (100dB) | |
|RR 3 0 200k ; RR sets open loop gain => 200k | |
|CC 3 0 8n ; CC=Vmax/Slew => 8n | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 0.4 (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2} | |
|* BD 0 3 I=(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2 | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|* B1 4 0 V=(abs(V(3)+12)-abs(V(3)-12))/2 | |
|.ENDS LF157 | |
|.MODEL DMOD D IS=1E-14 CJO=10p BV=30V IBV=1m | |
|VIN 1 0 DC 0 SIN(0 1V 1kHz) | |
|X1 0 2 3 LF157 | |
|D1 3 4 DMOD | |
|D2 2 3 DMOD | |
|R1 1 2 1K | |
|R2 2 3 10k | |
|RL 4 0 10K | |
|.TRAN 10u 2m 0 10u | |
|.PRINT TRAN V(1) V(3) V(4) | |
|.END | |
Fig. 2.12.12. Listing of PSPICE input file for frequency response of the high precision diode circuit using the LF157 operational amplifier.
Silicon diodes have a voltage drop of 0.6 to 0.7 V in the forward direction. Therefore they cannot be used directly as rectifiers for small signals. Either the signal must be amplified at first, or the special high-precision diode circuit shown in Fig. 2.12.12 should be used. The circuit rectifiers and amplifiers signal at the same time. Results of SPICE simulations are shown in Fig. 2.12.13.
[pic]
Fig. 2.12.13. Transient response of the high precision diode circuit using the LF157 opamp.
7 Astable multivibrator
|Spice Input File: OPA7.CIR |Circuit Diagram |
|Astable multivibrator | |
|.SUBCKT LM101 1 2 5 |[pic] |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 2MEG ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|IB1 1 0 150nA ; input biasing current | |
|IB2 2 0 150nA ; input biasing current | |
|GC 0 3 1 0 30U; CMRR => 30u (90dB) | |
|RR 3 0 120k ; RR sets open loop gain => 120k | |
|CC 3 0 16nF ; CC=Vmax/Slew => 16nF | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 80m (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2} | |
|* BD 0 3 I=(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2 | |
|* Rail voltages => -14V and +14V | |
|E1 4 0 VALUE {(abs(V(3)+14)-abs(V(3)-14))/2} | |
|* B1 4 0 V=(abs(V(3)+14)-abs(V(3)-14))/2 | |
|.ENDS LM101 | |
|X1 1 2 3 LM101 | |
|R1 1 0 1K | |
|R2 1 3 10k | |
|R3 3 2 20K | |
|C1 2 0 10nF | |
|.TRAN 10u 2m 0 10u UIC | |
|.PRINT TRAN V(1) V(3) V(2) | |
|.END | |
Fig. 2.12.14. Listing of PSPICE input file for transient analysis of the astable multivibrator using the LM101 operational amplifier.
The circuit of Fig. 2.12.14 generates a square wave whose frequency depends on the C1(R3 time constant and the threshold set by the R1-R2 resistor divider. For a smaller ratio of R1/R2, a higher frequency is generated.
[pic]
Fig. 2.12.15. Transient response of the astable multivibrator using the
LM101 operational amplifier.
8 Piecewise linear transfer function
|Spice Input File: OPA8.CIR |Circuit Diagram |
|Piecewise linear transfer function | |
|.SUBCKT LM101 1 2 5 | |
|* connections: +inp, -inp, out |[pic] |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 2MEG ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|IB1 1 0 150nA ; input biasing current | |
|IB2 2 0 150nA ; input biasing current | |
|GC 0 3 1 0 30U; CMRR => 30u (90dB) | |
|RR 3 0 120k ; RR sets open loop gain => 120k | |
|CC 3 0 16nF ; CC=Vmax/Slew => 16nF | |
|GD 0 3 VALUE {(abs(V(1,2)+80m)-abs(V(1,2)-80m))/2} | |
|E1 4 0 VALUE {(abs(V(3)+14)-abs(V(3)-14))/2} | |
|* B1 4 0 V=(abs(V(3)+14)-abs(V(3)-14))/2 | |
|.ENDS LM101 | |
|.MODEL DMOD D IS=1E-14 | |
|D1 2 4 DMOD | |
|D2 5 2 DMOD | |
|X1 0 2 3 LM101 | |
|R1 1 2 100K | |
|R2 2 3 200k | |
|R3 3 4 2K | |
|R4 4 6 100 | |
|R5 3 5 2K | |
|R6 5 7 2K | |
|VIN 1 0 | |
|VR1 6 0 DC 10 | |
|VR2 7 0 DC -10 | |
|.DC VIN -8 8 0.1 VR2 -8 -0 2 | |
|.PRINT DC V(3) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.12.16. Listing of PSPICE input file for the circuit with piecewise linear transfer function using LM101 operational amplifier.
In this circuit, the positive output voltage is limited to
[pic],
while the negative output voltage is limited to
[pic].
The gain in the middle section is set by the ratio of R2/R1.
[pic]
Fig. 2.12.17. dc transfer characteristics of the circuit with piecewise linear transfer function.
9 Magnitude limiting circuit
The concept of the magnitude limiting circuit is identical to the circuit of Fig. 2.12.16, but in this case the reference voltages (VR1 and VR2) are controlled by sinusoidal signal. As a result, the pulse magnitude is modulated as shown in Fig. 2.12.19.
|Spice Input File: OPA9.CIR |Circuit Diagram |
|Magnitude limiting circuit |[pic] |
|.SUBCKT LF155 1 2 5 | |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|GC 0 3 1 0 10U ; CMRR => 30u (90dB) | |
|RR 3 0 220k ; RR sets open loop gain => 120k | |
|CC 3 0 65nF ; CC=Vmax/Slew => 65nF | |
|GD 0 3 VALUE {(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2} | |
|E1 4 0 VALUE {(abs(V(3)+14)-abs(V(3)-14))/2} | |
|* B1 4 0 V=(abs(V(3)+14)-abs(V(3)-14))/2 | |
|.ENDS LF155 | |
|.MODEL DMOD D IS=1E-14 | |
|D1 2 4 DMOD | |
|D2 5 2 DMOD | |
|X1 0 2 3 LF155 | |
|X2 0 9 6 LF155 | |
|R1 1 2 100K | |
|R2 2 3 200k | |
|R3 3 4 10K | |
|R4 4 6 10K | |
|R5 3 5 10K | |
|R6 5 7 10K | |
|R7 7 9 10K | |
|R8 9 6 10K | |
|VIN1 1 0 PULSE(-5 5 1u 1u 1u 100u 200u) | |
|VIN2 7 0 SIN(-5V 4V 500Hz) | |
|.TRAN 10u 5m 0 10u | |
|.PRINT TRAN V(1) V(3) V(7) V(6) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.12.18. Listing of PSPICE input file for transient analysis of magnitude limiting circuit.
[pic]
(a)
[pic]
(b)
Fig. 2.12.19. Transient response of the magnitude limiting circuit: (a) input signals, (b) output signal.
13 Small-Signal Models
1 Small-signal model of the common-emitter configuration
|Spice Input File SMA1.CIR |Circuit Diagram |
|Common-emitter configuration |[pic] |
|.MODEL BMOD NPN IS=1E-14 BF=100 VA=100 | |
|Q1 2 1 0 BMOD | |
|IB 0 1 DC 10uA | |
|VCC 3 0 DC 5V | |
|VA 3 2 | |
|.TF I(VA) IB | |
|.END | |
Fig. 2.13.1. SPICE input file for displaying small-signal parameters for
the common-emitter configuration
SPICE results for Fig. 2.13.1:
Node voltages: (1) .6551 (2) 5.0000 (3) 5.0000
I(VA)/IB = 1.043E+02
INPUT RESISTANCE AT IB = 2.586E+03
OUTPUT RESISTANCE AT I(VA) = 1.000E+05
| |
|Spice Input File SMA2.CIR |Circuit Diagram |
|Common-Emitter Configuration |[pic] |
|.MODEL BMOD NPN IS=1E-14 BF=100 VA=100 | |
|Q1 2 1 0 BMOD | |
|VB 1 0 DC 0.6551 | |
|VCC 3 0 DC 5V | |
|VA 3 2 | |
|.TF I(VA) VB | |
|.END | |
| |
Fig. 2.13.2. SPICE input file for displaying small-signal parameters for common-emitter configuration.
SPICE results for Fig. 2.13.2:
Node voltages: (1) .6551 (2) 5.0000 (3) 5.0000
IB 1.00E-05 IC 1.04E-03 BETADC 1.04E+02
RO 1.00E+05 RPI 2.59E+03 RX 0.00E+00
GM 4.03E-02 BETAAC 1.04E+02
I(VA)/VB = 4.033E-02
INPUT RESISTANCE AT VB = 2.586E+03
OUTPUT RESISTANCE AT I(VA) = 1.000E+05
Figure 2.13.3 shows a equivalent small-signal models for common-emitter configuration using parameters obtained with SPICE input files of Figs. 2.13.1 and 2.13.2.
[pic]
Fig. 2.13.3. Small-signal equivalent models resulting from SPICE computations: (a) using the input of Fig. 2.13.1, and (b) using the input of Fig. 2.13.2. Note that all numerical values are specific
to a given bias point.
The following analytical formulas are used for common emitter small-signal parameters:
[pic] [pic] [pic] [pic] (2.13.1)
where VT is the thermal potential, VT = 0.0259 V at 300 K, IC and IE are collector and emitter biasing currents, VAF is the forward Early voltage, and bF is the forward current gain.
2 Small-signal model of common-collector configuration
| |
|Spice Input File SMA3.CIR |Circuit Diagram |
|Common-Collector Configuration |[pic] |
|.MODEL BMOD NPN IS=1E-14 BF=100 VA=100 | |
|Q1 2 1 3 BMOD | |
|VB 1 0 DC 0.6551 | |
|VCC 2 0 DC 5V | |
|IE 3 0 DC 1.05mA | |
|.TF V(3) VB | |
|.OP | |
|.END | |
| |
Fig. 2.13.4. SPICE input file for finding the small-signal parameters for the common-collector configuration.
SPICE results for Fig. 2.13.4:
Node voltages: (1) .6551 (2) 5.0000 (3) 85.43E-06
IB 9.97E-06 IC 1.04E-03 BETADC 1.04E+02
RO 1.00E+05 RPI 2.59E+03 RX 0.00E+00
GM 4.02E-02 BETAAC 1.04E+02
V(3)/VB = 9.998E-01
INPUT RESISTANCE AT VB = 1.057E+07
OUTPUT RESISTANCE AT V(3) = 2.463E+01
Figure 2.13.5 shows an equivalent small-signal model for the common-collector configuration using parameters obtained with SPICE.
[pic]
Fig. 2.13.5. Small-signal equivalent models resulting from the SPICE computations for the common-collector configuration.
The following analytical formulas are used for common-collector small-signal parameters:
[pic][pic][pic] (2.13.2)
where VT is the thermal potential, VT = 0.0259 V at 300 K, IC and IE are collector and emitter biasing currents, VAF is the forward Early voltage, and bF is the forward current gain.
3 Small-signal model of common-base configuration
|Spice Input File SMA4.CIR |Circuit Diagram |
|Common-Base Configuration |[pic] |
|.MODEL BMOD NPN IS=1E-14 BF=100 VA=100 | |
|Q1 2 0 1 BMOD | |
|VA 3 2 | |
|VCC 2 0 DC 5V | |
|IE 1 0 DC 1.05mA | |
|.TF I(VA) IE | |
|.OP | |
|.END | |
Fig. 2.13.6. SPICE input file for identifying small-signal parameters for the common-base configuration.
SPICE results for Fig. 2.13.6:
Node voltages: (1) -.6549 (2) 5.0000 ( 3) 5.0000
IB 9.91E-06 IC 1.04E-03 BETADC 1.05E+02
RO 1.01E+05 RPI 2.61E+03 RX 0.00E+00
GM 4.02E-02 BETAAC 1.05E+02
I(VA)/IE = 9.906E-01
INPUT RESISTANCE AT IE = 2.463E+01
OUTPUT RESISTANCE AT I(VA) = 1.070E+07
Figure 2.13.7 shows an equivalent small-signal model for the common-base configuration using parameters obtained with SPICE.
[pic]
Fig. 2.13.7. Small-signal equivalent circuit resulting from the SPICE computations for the common-base configuration.
Analytical formulas used for common base small-signal parameters are:
[pic][pic][pic] (2.12.3)
where VT is the thermal potential, VT = 0.0259 V at 300K, IC and IE are collector and emitter biasing currents, VAF is the forward Early voltage, and bF is the forward current gain.
4 Small-signal model of a MOS amplifier
|Spice Input File SMA5.CIR |Circuit Diagram |
|Small-signal Model of MOS Amplifier |[pic] |
|.MODEL NMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 LAMBDA=0.03 | |
|RD 3 2 100K | |
|VDD 3 0 DC 5V | |
|VIN 1 0 DC 1.2V | |
|M1 2 1 0 0 NMOS W=20U L=2U | |
|.TF V(2) VIN | |
|.OP | |
|.END | |
Fig. 2.13.8. SPICE input file for identifying small-signal parameters for a MOS the common-source amplifier.
SPICE results for Fig. 2.13.8:
Node voltages: ( 1) 1.2000 (2) 2.2945 (3) 5.0000
ID 2.71E-05 VGS 1.20E+00 VDS 2.29E+00
VBS 0.00E+00 VTH 7.50E-01 VDSAT 4.50E-01
GM 1.20E-04 GDS 7.59E-07 GMB 5.82E-05
V(2)/VIN = -1.118E+01
INPUT RESISTANCE AT VIN = 1.000E+20
OUTPUT RESISTANCE AT V(2) = 9.294E+04
Figure 2.13.9 shows an equivalent small-signal model for the common-source configuration using parameters obtained with SPICE. The input resistance is limited by numerical accuracy of the program.
[pic]
Fig. 2.13.9. Small-signal equivalent circuit resulting from the SPICE computations for a MOS common-source amplifier.
14 Single Stage Amplifiers
1 Emitter follower
|Spice Input File ONE1.CIR |Circuit Diagram |
|Emitter follower |[pic] |
|.MODEL BMOD NPN IS=1E-14 BF=100 VA=100 | |
|Q1 4 2 2 BMOD | |
|VCC 4 0 DC 10V | |
|VIN 1 0 DC 5 | |
|VSIG 2 0 SIN(0 3V 10kHz) | |
|RE 3 0 2K | |
|.TRAN 10u 1m 0 10u | |
|.END | |
Fig. 2.14.1. SPICE input file for transient analysis of the emitter follower.
For the basic circuit of Fig. 2.14.1, the voltage on the emitter follows the base voltage. The emitter voltage is always about 0.7 V lower than the base voltage, as Fig. 2.14.2 illustrates.
[pic]
Fig. 2.14.2. SPICE result for transient analysis of the emitter follower.
2 Distortion analysis in the common-source amplifier
|Spice Input File ONE 2.CIR |Circuit Diagram |
|Transient analysis of common-source amplifier | |
|*using .FOUR statement | |
|.MODEL MNMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 |[pic] |
|+ LAMBDA=0.03 | |
|M1 3 2 0 0 MNMOS L=2um W=20um | |
|C1 1 2 1uF | |
|C2 3 4 10uF | |
|VDD 5 0 DC 12V | |
|VIN 1 0 SIN(0 1V 1kHz) | |
|R1 2 0 200k | |
|R2 2 5 1MEG | |
|RD 3 5 22K | |
|RL 4 0 10K | |
|.TRAN 10u 2m 0 10u | |
|.PRINT TRAN V(1) V(4) | |
|.FOUR 1KHz V(4) | |
|.OP | |
|.END | |
Fig. 2.14.3. SPICE input file for transient analysis of the common-source amplifier.
This example illustrates the use of the .FOUR statement for Fourier analysis of a node voltage obtained using transient analysis. The MOS transistor in Fig. 2.14.3 is driven with relatively large voltage; therefore the output signal is distorted as seen in Fig. 2.14.4. The statement .FOUR 1KHZ V(4) performs a Fourier analysis of the voltage waveform on node 4 using 1 kHz as the base frequency. The results for 9 harmonics are printed in the printed table.
[pic]
Fig. 2.14.4. SPICE result for transient analysis of the common-source amplifier.
SPICE results for Fig. 2.14.3:
FOURIER COMPONENTS OF TRANSIENT RESPONSE V(4)
DC COMPONENT = -4.097476E-01
HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED
NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)
1 1.000E+03 2.402E+00 1.000E+00 -1.799E+02 0.000E+00
2 2.000E+03 4.131E-01 1.720E-01 9.017E+01 2.701E+02
3 3.000E+03 2.735E-02 1.138E-02 -1.799E+02 -9.303E-03
4 4.000E+03 1.724E-03 7.174E-04 9.381E+01 2.737E+02
5 5.000E+03 3.037E-04 1.264E-04 1.754E+02 3.553E+02
6 6.000E+03 7.681E-05 3.197E-05 1.585E+02 3.384E+02
7 7.000E+03 6.694E-05 2.786E-05 1.589E+02 3.388E+02
8 8.000E+03 5.820E-05 2.423E-05 1.559E+02 3.358E+02
9 9.000E+03 5.258E-05 2.189E-05 1.533E+02 3.333E+02
TOTAL HARMONIC DISTORTION = 1.723430E+01 PERCENT
3 Load line for the common-source amplifier
|Spice Input File ONE3.CIR |Circuit Diagram |
|Load line for common source amplifier |[pic] |
|.MODEL MNMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 | |
|+ LAMBDA=0.03 | |
|M1 2 1 0 0 MNMOS L=2um W=20um | |
|VD 2 0 | |
|VDD 3 0 DC 9V | |
|VG 1 0 | |
|RL 3 2 3K | |
|.DC VD 0 10V 0.1V VG 0 5V 1V | |
|.PRINT DC ID(M1) I(RL) | |
|.END | |
Fig. 2.14.5. PSPICE input file for load-line analysis of a common-source amplifier.
This example illustrates how to draw the load line (see Figs. 2.14.5 and 2.14.6). This is done by fixing the supply voltage VDD = 9 V and scanning the voltage on node 2 using an additional voltage source VD. Code in the .PRINT statement uses the PSPICE additional feature for printing drain and resistor currents and will not work with other SPICE programs.
[pic]
Fig. 2.14.6. SPICE result for load-line analysis of a common-source amplifier.
4 Single-stage bipolar transistor amplifier
|Spice Input File: ONE4.CIR |Circuit Diagram |
|Single-stage bipolar transistor amplifier | |
|* ac analysis | |
|.MODEL Q2N2222 NPN(IS=1.9E-14 BF=150 |[pic] |
|+ VAF=100 IKF=.175 ISE=5E-11 NE=2.5 | |
|+ BR=7.5 VAR=6.38 IKR=.012 ISC=1.9E-13 | |
|+ NC=1.2 RC=.4 XTB=1.5 CJE=26PF TF=.5E-9 | |
|+ CJC=11PF TR=30E-9 KF=3.2E-16 AF=1.0) | |
|VSUP 3 0 DC 12V | |
|R1 1 3 100K | |
|R2 1 0 20K | |
|RC 2 3 5.6K | |
|RE 4 0 1.3K | |
|RL 6 0 4.7K | |
|CS 5 1 10U | |
|CE 4 0 100U | |
|CL 2 6 10U | |
|VIN 5 0 AC 1 | |
|QA 2 1 4 Q2N2222 | |
|.AC DEC 10 10 100MEG | |
|.PRINT AC V(5) V(6) | |
|.OPTION NOPAGE | |
|. END | |
Fig. 2.14.7. Listing of SPICE input file for a common-emitter bipolar transistor amplifier.
In the common-emitter amplifier, (Fig. 2.14.7), the low-frequency breakpoint is limited by the smallest of three time constants, one associated with capacitor CS, another with capacitor CE, and the third with capacitor CL. The high frequency corner depends on parasitic capacitors of the bipolar transistor QA and the parallel connection of RC and RL (see Fig. 2.14.8).
[pic]
Fig. 2.14.8 Frequency response of the common-emitter amplifier.
5 Transient response of a single-stage bipolar transistor amplifier
|Spice Input File: ONE5.CIR |Circuit Diagram |
|Single-stage bipolar transistor amplifier | |
|* transient response | |
|.MODEL Q2N2222 NPN(IS=1.9E-14 BF=150 |[pic] |
|+ VAF=100 IKF=.175 ISE=5E-11 NE=2.5 | |
|+ BR=7.5 VAR=6.38 IKR=.012 ISC=1.9E-13 | |
|+ NC=1.2 RC=.4 XTB=1.5 CJE=26PF TF=.5E-9 | |
|+ CJC=11PF TR=30E-9 KF=3.2E-16 AF=1.0) | |
|VSUP 3 0 DC 12V | |
|R1 1 3 100K | |
|R2 1 0 20K | |
|RC 2 3 5.6K | |
|RE 4 0 1.3K | |
|RL 6 0 4.7K | |
|CS 5 1 10U | |
|CE 4 0 100U | |
|CL 2 6 10U | |
|VIN 5 0 SIN (0 1MV 1KHZ) | |
|QA 2 1 4 Q2N2222 | |
|.TRAN 20u 5m 0 20u | |
|.PRINT TRAN V(5) V(6) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.14.9. Listing of SPICE input file for a bipolar transistor common-emitter amplifier.
[pic]
Fig. 2.14.10. Transient response of the common-emitter amplifier.
In the circuit of Fig. 2.14.9, one may observe a significant voltage gain between nodes 5 and 6. The amplifier operates with very small distortion, since both input and output signals are very small (see Fig. 2.14.10). This is not true when the magnitude of the input signal increases, as is demonstrated in the next example shown in Figs. 2.14.11 and 2.14.12.
|Spice Input File: ONE6.CIR |Circuit Diagram |
|Single-stage bipolar transistor amplifier | |
|* responses to large signals | |
|.MODEL Q2N2222 NPN(IS=1.9E-14 BF=150 | |
|+ VAF=100 IKF=.175 ISE=5E-11 NE=2.5 |[pic] |
|+ BR=7.5 VAR=6.38 IKR=.012 ISC=1.9E-13 | |
|+ NC=1.2 RC=.4 XTB=1.5 CJE=26PF TF=.5E-9 | |
|+ CJC=11PF TR=30E-9 KF=3.2E-16 AF=1.0) | |
|VSUP 3 0 DC 12V | |
|R1 1 3 100K | |
|R2 1 0 20K | |
|RC 2 3 5.6K | |
|RE 4 0 1.3K | |
|RL 6 0 4.7K | |
|CS 5 1 10U | |
|CE 4 0 100U | |
|CL 2 6 10U | |
|QA 2 1 4 Q2N2222 | |
|VIN 5 0 SIN (0 {mag} 1KHZ) | |
|.PARAM mag=10m | |
|.TRAN 10u 3m 0 10u | |
|.STEP PARAM mag 5m 30m 5m | |
|.PRINT TRAN V(6) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.14.11. Listing of SPICE input file for the bipolar common-emitter amplifier
with large input signal.
[pic]
Fig. 2.14.12 Output voltage for different input signal magnitudes.
One can observe significant distortion for input voltages larger than 10 mV. Distortion can be significantly reduced by adding an additional series resistor in the emitter circuit, but reduction of distortion also leads to a lower voltage gain.
6 Single-stage CG MOS transistor amplifier
|Spice Input File: ONE7.CIR |Circuit Diagram |
|Single-stage CG MOS transistor amplifier | |
|* frequency response for common-gate amplifier |[pic] |
|.MODEL NMOS NMOS VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 LAMBDA=0.03 | |
|+ CGDO=0.4n CGSO=0.4n CGBO=0.4n CJ=0.1m | |
|VDD 3 0 DC 9V | |
|R1 2 0 150k | |
|R2 2 3 750k | |
|RD 4 3 20k | |
|C1 2 0 1nF | |
|VIN 1 0 AC 1V sin(0 1 20) | |
|M1 4 2 1 0 NMOS L=3u W=100u AS=5p AD=5p | |
|.AC DEC 20 1k 1000MEG | |
|.PRINT AC V(4) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.14.13. Listing of SPICE input file for the common-gate MOS transistor amplifier.
The amplifier of Fig. 2.14.13 has constant voltage gain from dc to very large frequencies. The flat frequency response, as shown in Fig. 2.14.14, can be only secured with the addition of bypass capacitor C1, which must be significantly larger than the parasitic capacitances of the MOS transistor.
[pic]
Fig. 2.14.14. Frequency response of the single-stage common-gate MOS transistor amplifier.
15 Multistage Amplifiers
1 Differential amplifier
| |
|Spice Input File MUL1.CIR |Circuit Diagram |
|Differential amplifier |[pic] |
|.MODEL QMOD PNP IS=1E-14 BF=150 | |
|+ BR=2 VAF=100 VAR=50 | |
|Q1 4 1 3 QMOD | |
|Q2 5 2 3 QMOD | |
|RE 6 3 2.2K | |
|VBAT 6 0 DC 9V | |
|VREF 2 0 DC 6V | |
|VIN 1 2 0 | |
|R1 4 0 5.6K | |
|R2 5 0 5.6K | |
|.DC VIN -0.1 0.1 2m | |
|.PRINT DC V(4) V(5) | |
|.TF V(5) VIN | |
|.END | |
| |
Fig. 2.15.1. SPICE input file for dc transfer analysis of the differential amplifier.
This example illustrates operation of a differential amplifier composed pnp transistors (see Fig. 2.15.1). Note the sigmoidal (hyperbolic tangent) type of transfer function shown in Fig. 2.15.2. The circuit operates in a linear region only for input signals smaller than (25 mV.
[pic]
Fig. 2.15.2. SPICE result for dc transfer analysis of the differential amplifier.
SPICE results for Fig. 2.15.1:
**** SMALL-SIGNAL CHARACTERISTICS
V(5)/VIN = 5.541E+01
INPUT RESISTANCE AT VIN = 1.464E+04
OUTPUT RESISTANCE AT V(5) = 5.519E+03
2 Opamp prototype with MOS transistors
| |
|Spice Input File MUL2.CIR |Circuit Diagram |
|Opamp prototype with MOS transistors | |
|.MODEL NMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.7 PHI=0.6 LAMBDA=0.03 |[pic] |
|.MODEL PMOS PMOS LEVEL=1 VTO=-0.75 | |
|+ KP=8u GAMMA=0.7 PHI=0.6 LAMBDA=0.04 | |
|M1 4 1 3 8 NMOS L=2um W=40um | |
|M2 5 2 3 8 NMOS L=2um W=40um | |
|RS 3 8 510k | |
|R1 9 5 510k | |
|R2 9 4 510k | |
|VREF 2 0 DC 0 | |
|VIN 1 0 DC 0 | |
|M3 6 5 9 9 PMOS L=2um W=30um | |
|RD 6 8 8.2k | |
|M4 9 6 7 8 NMOS L=2um W=100um | |
|RSS 7 8 5.1k | |
|VDD 9 0 DC 15V | |
|VSS 8 0 DC -15V | |
|.DC VIN -0.1 0.1 2m | |
|.PRINT DC V(4) V(5) V(6) V(7) | |
|.TF V(7) VIN | |
|.END | |
| |
Fig. 2.15.3. SPICE input file for DC transfer analysis of the opamp prototype.
This example presents the circuit of a simple operational amplifier using resistors and CMOS transistors (fig. 2.15.3). The first stage is a differential amplifier with transistors M1 and M2. The second stage uses transistor M3 and resistor RD. Transistor M4 works as a voltage follower (source follower). This is only a prototype in CMOS technology; resistors are rarely used. Results for the dc transfer characteristics are shown in Fig. 2.15.3.
[pic]
Fig. 2.15.4. SPICE result for dc transfer analysis of the opamp prototype.
SPICE results for Fig. 2.15.3:
**** SMALL-SIGNAL CHARACTERISTICS
V(7)/VIN = -1.153E+02
INPUT RESISTANCE AT VIN = 1.000E+20
OUTPUT RESISTANCE AT V(7) = 2.632E+02
3 Class AB amplifier
| |
|Spice Input File MUL3.CIR |Circuit Diagram |
|Class B amplifier |[pic] |
|.MODEL MODPNP PNP IS=1E-13 BF=100 | |
|+ BR=2 VAF=80 VAR=50 | |
|.MODEL MODNPN NPN IS=1E-13 BF=100 | |
|+ BR=2 VAF=80 VAR=50 | |
|.MODEL MR RES R=100 | |
|Q1 0 2 7 MODPNP | |
|Q2 9 3 7 MODNPN | |
|VIN 1 0 SIN(0 3V 1kHz) | |
|VDD 9 0 DC 6V | |
|C1 1 2 10uF | |
|C2 1 3 10uF | |
|C3 7 8 1mF | |
|R1 2 0 1K | |
|R2 3 9 1K | |
|R3 2 3 MR 1 | |
|RL 8 0 10 | |
|.TRAN 20u 2.5m 0 20u | |
|.PRINT TRAN V(8) | |
|.STEP RES MR(R) LIST 50 200 1k | |
|.END | |
| |
Fig. 2.15.5. SPICE input file for transient analysis of the class AB amplifier.
In the class AB power amplifier of Fig. 2.15.5, different values of resistor R3 set different quiescent currents. With a small value of R3, the quiescent current is small, and the amplifier has the “crossover” distortion shown in Fig. 2.15.6. A large value of R3 leads to smaller distortion but also to lower power efficiency of the amplifier. In a practical circuit, a small “crossover” distortion is tolerated, which is often eliminated by negative feedback.
[pic]
Fig. 2.15.6. SPICE result for transient analysis of the class AB amplifier. Note the crossover distortion for small values of R3.
4 Power amplifier
| |
|Spice Input File MUL4.CIR |Circuit Diagram |
|Power Amplifier |[pic] |
|.MODEL MODPNP PNP IS=1E-13 BF=100 | |
|+ BR=2 VAF=80 VAR=50 | |
|.MODEL MODNPN NPN IS=1E-13 BF=100 | |
|+ BR=2 VAF=80 VAR=50 | |
|.MODEL MSMALL NPN IS=1E-14 BF=250 | |
|+ BR=5 VAF=100 VAR=80 | |
|Q1 4 2 3 MSMALL | |
|Q2 5 6 4 MSMALL | |
|Q3 9 5 7 MODNPN | |
|Q4 0 4 7 MODPNP | |
|VIN 1 0 SIN(0 0.1V 1kHz) | |
|VDD 9 0 DC 6V | |
|C1 1 2 10uF | |
|C2 7 8 1mF | |
|RE 3 0 330 | |
|R1 2 0 3.3K | |
|R2 2 9 15K | |
|RC 8 5 1.5K | |
|RA 6 4 1K | |
|RB 5 6 1K | |
|RL 8 9 100 | |
|.TRAN 20u 2.5m 0 20u | |
|.PRINT TRAN V(2) V(4) V(7) V(5) V(6) v(8) | |
|.FOUR 1kHz V(8) | |
|.OP | |
|.END | |
Fig. 2.15.7. SPICE input file for transient analysis of the power amplifier.
Fig. 2.15.7 presents a complementary “push-pull” power amplifier. Resistor RC can also be also connected between node 5 and a large positive power supply. In the circuit of Fig. 2.15.7 the resistor is connected between node 5 and the output voltage of node 8. In this way the voltage drop across resistor RC is almost constant and equal to half the supply voltage. Therefore transistor Q2 and resistors RA and RB are supplied with a constant current equal to 0.5 VDD/RC. Waveforms of the “push-pull” power amplifier are shown in Fig. 2.15.8.
SPICE results for Fig. 2.13.7:
FOURIER COMPONENTS OF TRANSIENT RESPONSE V(8)
DC COMPONENT = 5.945410E+00
HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED
NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)
1 1.000E+03 2.430E+00 1.000E+00 9.230E-01 0.000E+00
2 2.000E+03 4.430E-02 1.823E-02 -8.987E+01 -9.079E+01
3 3.000E+03 7.680E-02 3.160E-02 2.312E+00 1.389E+00
4 4.000E+03 3.680E-02 1.514E-02 9.407E+01 9.314E+01
5 5.000E+03 4.865E-02 2.002E-02 -1.756E+02 -1.765E+02
6 6.000E+03 8.809E-03 3.625E-03 -8.541E+01 -8.633E+01
7 7.000E+03 1.522E-02 6.262E-03 5.903E+00 4.980E+00
8 8.000E+03 5.917E-03 2.435E-03 -8.532E+01 -8.624E+01
9 9.000E+03 5.952E-05 2.449E-05 9.445E+01 9.353E+01
TOTAL HARMONIC DISTORTION = 4.493375E+00 PERCENT
[pic]
Fig. 2.15.8. SPICE result for transient analysis of the power amplifier. Note voltage clipping for large magnitudes.
16 Analog Integrated Circuits
1 NMOS current mirror with gain of 100
|Spice Input File AIC1.CIR |Circuit Diagram |
|"Bipolar transistor" made of NMOS transistors |[pic] |
|.MODEL NMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 LAMBDA=0.03 | |
|IREF 0 1 DC 1uA | |
|VD 3 0 DC 5V | |
|VA 3 2 | |
|M1 1 1 0 0 NMOS W=2um L=20um | |
|M2 2 1 0 0 NMOS W=20um L=2um | |
|.DC VD 0 10V 0.1V IREF 1uA 5uA 1uA | |
|.PRINT DC I(VA) | |
|.TF I(VA) IREF | |
|.PROBE | |
|.OP | |
|.END | |
Fig. 2.16.1. SPICE input file for an NMOS current mirror with a current gain b = 100.
This example presents simple current mirror composed of two n-channel MOS transitors. The W/L ratios for these transistors were chosen in a such way that overall current gain is 100. In this sense the circuit operates as a bipolar transistor; see Fig. 2.16.2.
[pic]
Fig. 2.16.2. dc transfer characteristics for an NMOS current mirror with a current gain b = 100.
SPICE results for Fig. 2.16.1:
Node voltages: ( 1) 1.6234 ( 2) 5.0000 ( 3) 5.0000
NAME M1 M2
ID 1.00E-06 1.10E-04
VGS 1.62E+00 1.62E+00
VDS 1.62E+00 5.00E+00
**** SMALL-SIGNAL CHARACTERISTICS
I(VA)/IREF = 1.083E+02
INPUT RESISTANCE AT IREF => 4.313E+05
OUTPUT RESISTANCE AT I(VA) => 3.496E+05
2 Temperature characteristics of Widlar current source
|Spice Input File AIC2.CIR |Circuit Diagram |
|Widlar current source |[pic] |
|.MODEL QMOD NPN IS=1.9E-14 BF=100 VAF=100 | |
|+BR=5 VAR=80 XTI=3 XTB=1.5 EG=1.11 | |
|VC 3 0 DC 5V | |
|RE 4 0 1K | |
|IREF 0 1 1mA | |
|VA 3 2 | |
|Q1 1 1 0 QMOD | |
|Q2 2 1 4 QMOD | |
|.DC VC 0.1 12 0.1 | |
|.TEMP -50 0 50 100 150 | |
|.PRINT DC I(VA) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.16.3. SPICE input file for NMOS Widlar current source.
An interesting property of the Widlar current source (Fig. 2.16.3) is that its current changes in almost direct proportion to the absolute temperature in degrees Kelvin. This feature can be used to compensate the temperature decrease of the voltage gain of the bipolar differential amplifier.
[pic]
Fig. 2.16.4. dc transfer characteristics for a Widlar current source for different
temperatures T = -50oC, 0oC, 50oC, 100oC, and 150oC.
Note that the current of the Widlar source is much smaller than the reference current and is almost proportional to the absolute temperature in K.
3 Comparison of simple and cascode current mirrors
|Spice Input File AIC3.CIR |Circuit Diagram |
|Comparison of simple and cascode current mirrors | |
|.MODEL NMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 LAMBDA=0.03 |[pic] |
|IREF 0 1 DC 100uA | |
|VD 5 0 DC 5V | |
|VA1 5 3 | |
|VA2 5 4 | |
|M1 2 2 0 0 NMOS W=20um L=2um | |
|M2 1 1 2 0 NMOS W=20um L=2um | |
|M3 6 2 0 0 NMOS W=20um L=2um | |
|M4 3 1 6 0 NMOS W=20um L=2um | |
|M5 4 2 0 0 NMOS W=20um L=2um | |
|.DC VD 0 5V 0.1V IREF 100uA 500uA 100uA | |
|.PRINT DC I(VA1) I(VA2) | |
|.TF I(VA1) IREF | |
|*.TF I(VA2) IREF | |
|.OP | |
|.END | |
Fig. 2.16.5. SPICE input file for comparison of simple and cascode current mirrors.
Results of comparison are presented in Fig. 2.16.6. Note that the simple current mirror operates with smaller voltages, but its current is voltage-dependent. The output resistance of the cascode current mirror is much larger, approximately by a factor of gmro.
[pic]
Fig. 2.16.6. Comparison of dc transfer characteristics of simple and cascode current mirrors.
SPICE results for Fig. 2.16.5:
**** SMALL-SIGNAL CHARACTERISTICS
I(VA1)/IREF = 1.000E+00
INPUT RESISTANCE AT IREF = 9.667E+03
OUTPUT RESISTANCE AT I(VA1) = 3.836E+07
I(VA2)/IREF = 1.083E+00
INPUT RESISTANCE AT IREF = 9.667E+03
OUTPUT RESISTANCE AT I(VA2) = 3.496E+05
Note that the cascode current mirror has very large output resistance, and the source to reference current ratio is equal to 1. However, the simple current source can operate at smaller voltages.
4 High-gain differential amplifier
|Spice Input File AIC4.CIR |Circuit Diagram |
|High-gain differential amplifier |[pic] |
|.MODEL NMOS NMOS LEVEL=1 VTO=0.75 | |
|+ KP=25u GAMMA=0.75 PHI=0.6 LAMBDA=0.03 | |
|.MODEL PMOS PMOS LEVEL=1 VTO=-0.75 | |
|+ KP=8u GAMMA=0.7 PHI=0.6 LAMBDA=0.03 | |
|IS 3 0 DC 1uA | |
|IS1 10 0 DC 0.1mA | |
|V1 1 2 DC 0V | |
|V2 2 0 DC 2V | |
|VREF 4 0 DC 3.5V | |
|VDD 9 0 DC 12V | |
|M1 11 1 3 0 NMOS W=30um L=2um | |
|M2 12 2 3 0 NMOS W=30um L=2um | |
|M3 5 4 11 0 NMOS W=10um L=2um | |
|M4 6 4 12 0 NMOS W=10um L=2um | |
|M5 5 5 7 9 PMOS W=10um L=2um | |
|M6 6 5 8 9 PMOS W=10um L=2um | |
|M7 7 7 9 9 PMOS W=10um L=2um | |
|M8 8 7 9 9 PMOS W=10um L=2um | |
|M9 9 6 10 0 NMOS W=100um L=2um | |
|.DC V1 -0.1m 0.1m 0.5u | |
|.PRINT DC V(10) | |
|.TF V(10) V1 | |
|.END | |
Fig. 2.16.7. SPICE input file for a high-gain differential amplifier.
This example illustrates that a very high voltage gain can be achieved in a single-stage differential amplifier (Fig. 2.16.7). The second stage, made up of transistor M9, is only a source follower. As one can see in Fig. 2.16.8, the voltage gain of this amplifier is over 400,000 V/V. The exact value of 443,800 was obtained using the .TF statement. This high gain is accomplished using a cascode approach for both the differential amplifier and the active current mirror, resulting in an extremely large output resistance associated with node 6.
[pic]
Fig. 2.16.6. dc transfer characteristics for the high-gain differential amplifier.
SPICE results for Fig. 2.16.7:
**** SMALL-SIGNAL CHARACTERISTICS
V(10)/V1 = 4.438E+05
INPUT RESISTANCE AT V1 = 1.000E+20
OUTPUT RESISTANCE AT V(10) = 1.642E+03
17 Frequency Response
1 Frequency response of a given transfer function
|Spice Input File FRE1.CIR |Circuit Diagram |
|Transfer function response |[pic] |
|VIN 1 0 AC 1V | |
|ET 2 0 LAPLACE {V(1)}={s*(s/10+1) | |
|+/((s/0.1+1)*(s/1000+1)*(s/100k+1))} | |
|.AC DEC 10 0.001Hz 10MEG | |
|.PRINT AC VM(2) VP(2) | |
|.END | |
Fig. 2.17.1. PSPICE input file for transfer function response.
Fig. 2.17.1 illustrates another enhanced feature of the PSPICE program. Using the LAPLACE keyword, the voltage-controlled voltage source can be used to generate output for any required transfer function. Results are shown in Fig. 2.17.2.
[pic]
[pic]
Fig. 2.17.2. Response of the transfer function.
2 Frequency response of second-order low-pass function
|Spice Input File FRE2.CIR |Circuit Diagram |
|Frequency response of the second-order LP Filter |[pic] |
|VIN 1 0 AC 1V | |
|.PARAM wo={6.28*1000} Q=10 | |
|ET 2 0 LAPLACE {V(1)}={wo*wo/(s*s+s*wo/Q+wo*wo)} | |
|.AC DEC 25 100Hz 10k | |
|.STEP PARAM Q LIST 0.5 1 10 | |
|.PRINT AC VM(2) VP(2) | |
|.END | |
Fig. 2.17.3. PSPICE input file for the frequency response of a second order low-pass filter.
Figs. 2.17.3 and 2.17.4 show another example of using the LAPLACE keyword in the dependent voltage source. This time the second-order low-pass filter is implemented. Another interesting feature of the PSPICE program is to use the .PARAM statement and PARAM keyword. Using this feature together with the .STEP statement, any parameter can be stepped during the analysis. In this case the Q parameter was stepped.
[pic]
[pic]
Fig. 2.17.4. Magnitude and phase of the second-order low-pass filter.
3 Transient response of second order low-pass filter
|Spice Input File FRE3.CIR |Circuit Diagram |
|Transient response of the second-order LP filter |[pic] |
|VIN 1 0 PULSE (0 1 0.1m 1u) | |
|.PARAM wo={6.28*1000} Q=10 | |
|ET 2 0 LAPLACE {V(1)}={wo*wo/(s*s+s*wo/Q+wo*wo)} | |
|.TRAN 10u 10m 0 10u | |
|.STEP PARAM Q LIST 0.5 1 10 | |
|.PRINT TRAN V(2) | |
|.END | |
Fig. 2.17.5. PSPICE input file for the transient response of a second-order low-pass filter.
Figs. 2.17.5 and 2.17.6 show an example of the transient analysis of a low-pass filter. The filter characteristic is given using the LAPLACE keyword specifying the transfer function. The circuit implementations for a given transfer function can be automatically synthesized using the polynomial menu of the FILTER program, which can be found on .
[pic]
Fig. 2.17.6. Transient response of the second order low-pass filter.
4 Transient response of a second order band-pass filter
|Spice Input File FRE4.CIR |Circuit Diagram |
|Band-Pass Chebyshev Filter |[pic] |
|VIN 1 0 AC 1V | |
|ET 2 0 CHEBYSHEV {V(1)} = | |
|+ BP 1kHz 1.2kHz 2kHz 2.5kHz 3dB 40dB | |
|.AC DEC 300 500Hz 5k | |
|.PRINT AC VM(2) VP(2) | |
|.END | |
Fig. 2.17.7. PSPICE input file for the frequency response of a band-pass Chebyshev filter.
Another interesting feature of the PSPICE program is the CHEBYSHEV keyword in the definition of the dependent source. This feature is illustrated in Figs. 2.17.7 and 2.17.8. Using this feature, transfer functions for various LP, HP, BP, and BS Chebyshev filters can be implemented. Butterworth filters can be always considered as Chebyshev filters with no frequency ripple.
[pic]
[pic]
Fig. 2.17.8. Magnitude and phase of the band-pass Chebyshev filter.
5 Frequency response of a common-emitter amplifier
|Spice Input File: FRE5.CIR |Circuit Diagram |
|Frequency response of a CE amplifier | |
|.MODEL Q2N2222 NPN | |
|+ IS=3f VAF=140 BF=250 VAR=60 BR=7 TR=50n TF=450p | |
|+ VTF=10 XTF=2 ITF=.1 NF=1.0 NR=1.1 NE=1.55 NC=2 |[pic] |
|+ ISE=150f ISC=100f NK=0.9 IKF=20m IKR=5m | |
|+ RB=50 RC=10 RE=0.2 CJC=15p VJC=.75 MJC=.45 FC=.5 | |
|+ CJE=25p VJE=.75 MJE=.33 XTI=3 XTB=1.5 EG=1.11 | |
|R1 2 0 20k | |
|R2 9 2 100k | |
|RE 3 0 1.3k | |
|RC 9 4 5.6k | |
|C1 1 2 1uF | |
|C2 3 0 1uF | |
|Q1 4 2 3 Q2N2222 | |
|VIN 1 0 AC 1V | |
|VCC 9 0 12V | |
|.AC DEC 20 1 1000MEG | |
|.PRINT AC VM(4) | |
|.OPTION NOPAGE | |
|.END | |
Fig. 2.17.9. Listing of PSPICE input file for frequency analysis of a CE amplifier.
The frequency response of the common-emitter amplifier of Fig. 2.17.9 is shown in Fig. 2.17.10. Note the two corner frequencies in the low-frequency range. The first is associated with coupling capacitor C1, and the second, for higher frequency, is associated with bypass capacitor C2.
[pic]
Fig. 2.17.10. Frequency response of the CE amplifier.
18 Feedback, Stability and Oscillators
1 Stability of an uncompensated operational amplifier
|Spice Input File: FEE1.CIR |Circuit Diagram |
|Uncompensated opamp with Feedback |[pic] |
|.SUBCKT OPAMP 1 2 5 | |
|* connections: +inp, -inp, out | |
|* PSPICE only - transfer function LAPLACE is used | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|RR 3 0 100k ; RR sets open loop gain => 100k | |
|* Poles at w1=1k and w2=200k | |
|GD 0 3 LAPLACE {V(1,2)}={1/((1+s/1E3)*(1+s/2E5))} | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|.ENDS OPAMP | |
|.MODEL MR RES R=100k | |
|VIN 1 0 DC 0.0001 AC 1V | |
|X1 1 2 3 OPAMP | |
|R1 2 0 100 | |
|RL 3 0 10K | |
|R2 2 3 MR 1 | |
|.OP | |
|.AC DEC 30 1kHz 10MEGHz | |
|.STEP RES MR(R) LIST 1 1k 10k 100k | |
|.PRINT AC VM(3) VP(3) | |
|.END | |
Fig. 2.18.1. PSPICE input file for frequency response of the uncompensated operational amplifier with various amounts of feedback.
The operational amplifier of Fig. 2.18.1 has two poles, and therefore the 180o phase shift required for oscillation will never occur. But with negative feedback, a significant frequency overshoot can be easily observed (Fig. 2.18.2). This is an undesirable effect, since a flat frequency response is usually required. Note also that the PSPICE .STEP statement is used to plot frequency response for various amounts of negative feedback.
[pic]
[pic]
Fig. 2.18.2. Magnitude and phase responses of the uncompensated operational amplifier with various amounts of feedback.
2 Phase-lead compensation of an amplifier
|Spice Input File: FEE2.CIR |Circuit Diagram |
|Phase-lead compensation of an amplifier |[pic] |
|.SUBCKT OPAMP 1 2 5 | |
|* connections: +inp, -inp, out | |
|* PSPICE only - transfer function LAPLACE is used | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 0.1K ; output resistance | |
|RR 3 0 100k ; RR sets open loop gain => 100k | |
|* Poles at w1=1k and w2=200k | |
|GD 0 3 LAPLACE {V(1,2)}={1/((1+s/1E3)*(1+s/2E5))} | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|.ENDS OPAMP | |
|VIN 1 0 DC 0.0001 AC 1V | |
|X1 1 2 3 OPAMP | |
|RL1 3 0 10K | |
|R1 2 0 1K | |
|R2 2 3 10K | |
|X2 1 4 5 OPAMP | |
|RL2 5 0 10K | |
|R3 4 0 1K | |
|R4 4 5 10K | |
|C1 4 5 80pF | |
|.AC DEC 30 1kHz 1MEGHz | |
|.PRINT AC VM(3) VM(5) VP(3) VP(5) | |
|.END | |
Fig. 2.18.3. PSPICE input file for the frequency response of the uncompensated (X1) and externally compensated (X2) amplifiers using the phase-lead technique.
The example illustrates how the “frequency overshoot” of an amplifier can be eliminated using the phase-lead technique. By introducing the RC circuit in the feedback loop, a pole-zero pair is created. The circuit is designed so that the zero is located at the original location of the second pole, and the new additional pole occurs at higher frequencies.
In the specific case of Fig. 2.18.3 the uncompensated amplifier has severe peaking at about 200 kHz. In order to eliminate this peaking capacitor C1 is added to create a zero in the feedback loop. The value of C1= 1/(2p * 200 kHz * 10 kW) ( 80 pF. The transfer function of the compensated R1/R2 resistor divider is
[pic]
[pic]
[pic]
Fig. 2.18.4. Magnitude and phase responses of uncompensated and externally compensated operational amplifiers.
3 Wien-bridge oscillator
|Spice Input File: FEE3.CIR |Circuit Diagram |
|Wien-bridge oscillator |[pic] |
|.SUBCKT LF155 1 2 5 | |
|* connections: +inp, -inp, out | |
|* PSPICE only - for SPICE3 use B-type elements | |
|RIN 1 2 1E12 ; input resistance | |
|ROUT 4 5 1K ; output resistance | |
|GC 0 3 1 0 10U ; CMRR => 10u (100dB) | |
|RR 3 0 200k ; RR sets open loop gain => 200k | |
|CC 3 0 65n ; CC=Vmax/Slew => 65n | |
|* Vmax=Imax=Slew/(6.28*Fmax) => 0.4 (gm=1) | |
|GD 0 3 VALUE {(abs(V(1,2)+0.4)-abs(V(1,2)-0.4))/2} | |
|* Rail voltages => -12V and +12V | |
|E1 4 0 VALUE {(abs(V(3)+12)-abs(V(3)-12))/2} | |
|.ENDS LF155 | |
|X1 1 2 3 LF155 | |
|R1 1 0 10K | |
|C1 1 0 10nF | |
|R2 1 4 10K | |
|C2 3 4 10nF | |
|R3 2 0 10K | |
|R4 2 3 20.5K | |
|.TRAN 20u 20m 0 20u UIC | |
|.IC V(3)=100m | |
|.PRINT TRAN V(3) | |
|.END | |
Fig. 2.18.5. PSPICE input file for transient response of the Wien-bridge oscillator.
In the ideal case, oscillation requires the ratio R4/R3 = 2. In order to start oscillation in a practical circuit, this ratio must be slightly larger. In Fig. 2.18.5, R4/R3 = 2.025. The magnitude of oscillation is limited by the “rail” voltages of the operational amplifier. Note, that the voltage on node 3 was set using the .IC statement to initiate oscillator start-up. With all initial voltages set to zero, the capacitance currents are also equal to zero. If capacitors are not charged (or discharged), no change can be expected from one time step to another.
[pic]
Fig. 2.18.6. Transient response of the Wien-Bridge oscillator.
2.1. Introduction 32
2.2. Solid-State Electronics 32
Example 1. Carrier mobility as a function of impurity doping 33
Example 2. Resistivity of silicon as a function of impurity concentration 34
Example 3. Intrinsic carrier concentration in silicon as a function of temperature 36
Example 4. Fermi potentials in silicon as a function of impurity concentrations and temperature 37
2.3. Diodes 38
Example 1. Diode temperature characteristics 38
Example 2. Voltage stabilization with the Zener diode 39
Example 3. Simple power supply 41
Example 4. Full wave rectifier circuit 43
Example 5. Full bridge rectifier circuit 45
Example 6. dc-dc converter 47
Example 7. Waveform shaping circuit 48
Example 8. Clamping circuit 49
2.4. Field-Effect Transistors 50
Example 1. Comparison of level 1 and level 2 MOS models 50
Example 1. 50
Example 2. Effect of substrate biasing on MOS transistor characteristics 52
Example 3. Biasing a MOS transistor 53
Example 4. Biasing a junction FET transistor 55
2.5. Bipolar Junction Transistors 56
Example 1. Bipolar transistor collector characteristics 56
Example 2. Bipolar transistor transfer characteristics 57
Example 3. Simple biasing of a bipolar transistor 58
Example 4. Improved biasing for the bipolar transistor 59
Example 5. Bipolar transistor as a simple switch 60
Example 6. Bipolar transistor switch with Schottky diode clamping 61
Example 7. Improved bipolar transistor switch with Schottky diode clamping 62
2.6. Introduction to Digital Electronics 64
Example 1. Diode OR and AND gates 64
Example 2. DTL NAND gate 65
2.7. MOS Logic 66
Example 1. NMOS inverter using two identical transistors 66
Example 2. Comparison of NMOS inverters 68
2.8. CMOS Logic 70
Example 1. Chain of CMOS inverters 70
Example 2. dc transfer characteristics of CMOS inverter 72
Example 3. CMOS NAND gate 72
2.9. Memories 74
Example 1. CMOS static memory cell with sense amplifier 74
Example 1. 74
Example 2. Domino dynamic gate 76
2.10. Bipolar Transistor Logic 78
Example 1. Schottky TTL NAND gate 78
Example 2. ECL OR gate 79
2.11. Analog Systems 80
Example 1. Simple first-order circuits 80
Example 2. Low-pass 5-th order Chebyshev ladder filter 82
2.12. Operational Amplifiers 83
Example 1. Inverting and noninverting amplifiers 83
Example 2. Transfer characteristics of a nonideal operational amplifier 84
Example 3. Frequency characteristics of a nonideal operational amplifier 87
Example 4. Second-order low-pass filter 90
Example 5. Second-order band-pass filter 91
Example 6. High-precision diode circuit 93
Example 7. Astable multivibrator 94
Example 8. Piecewise linear transfer function 95
Example 9. Magnitude limiting circuit 97
2.13. Small-Signal Models 99
Example 1. Small-signal model of common-emitter configuration 99
Example 2. Small-signal model of common-collector configuration 100
Example 3. Small-signal model of common-base configuration 101
Example 4. Small-signal model of a MOS amplifier 102
2.14. Single Stage Amplifiers 103
Example 1. Emitter follower 103
Example 2. Distortion analysis in the common-source amplifier 104
Example 2. 104
Example 3. Load line for the common-source amplifier 105
Example 4. Single-stage bipolar transistor amplifier 106
Example 5. Transient response of a single-stage bipolar transistor amplifier 107
Example 6. Single-stage CG MOS transistor amplifier 109
2.15. Multistage Amplifiers 110
Example 1. Differential amplifier 110
Example 2. Opamp prototype with MOS transistors 111
Example 3. Class AB amplifier 112
Example 4. Power amplifier 113
2.16. Analog Integrated Circuits 115
Example 1. NMOS current mirror with gain of 100 115
Example 1. 115
Example 2. Temperature characteristics of Widlar current source 116
Example 3. Comparison of simple and cascode current mirrors 117
Example 4. High-gain differential amplifier 118
2.17. Frequency Response 119
Example 1. Frequency response of a given transfer function 119
Example 2. Frequency response of second-order low-pass transfer function 121
Example 3. Transient response of second order low-pass filter 122
Example 4. Transient Response of a second order band-pass Chebyshev filter 123
Example 5. Frequency response of a common-emitter amplifier 124
2.18. Feedback, Stability and Oscillators 125
Example 1. Stability of an uncompensated operational amplifier 125
Example 2. Phase-lead compensation of an amplifier 127
Example 3. Wien-bridge oscillator 129
.AC statement, 80, 82, 90, 91, 106, 109, 119, 121, 123, 124, 125, 127
.CONTROL statement, 39
.DC statement, 35, 36, 37, 38, 57, 116, 117, 118
.ENDC statement, 39
.ENDS statement, 67, 71
.FOUR statement, 104, 113
.FUNCT statement, 32
.IC statement, 74, 129
.MODEL statement, 39, 40, 44, 45, 46, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 63, 64, 67, 69, 71, 72, 73, 74, 76, 78, 79, 104, 106, 107, 108, 109, 111, 112, 113, 116, 118
.OP statement, 83, 100, 101, 102, 104, 113
.OPTION statement, 39, 43, 47, 95, 106, 107, 108, 109, 116
.PARAM statement, 32, 33, 35, 108, 121, 122
.PRINT statement, 32, 33, 38, 48, 57, 80, 119
.PROBE statement, 32, 59, 115
.SAVE statement, 32, 36
.STEP statement, 39, 40, 84, 87, 90, 91, 93, 94, 112, 121, 122, 125
.SUBCKT statement, 67, 71, 74, 79, 83, 84, 87, 90, 91, 93, 94, 95
.TEMP statement, 38
.TF statement, 82, 83, 99, 100, 101, 102, 111, 115, 117, 118
.TRAN statement, 40, 41, 43, 44, 45, 46, 47, 48, 63, 64, 73, 94, 103, 107, 108, 122, 129
ALTER statement, 39
B type source, 88, 90, 91, 93, 94, 95
band-pass filter, 92
Bessel-Thomson filter, 82
body effect, 54
Butterworth filter, 82
cascode current mirror, 117
Cauer filter, 82
Chebyshev filter, 82
CHEBYSHEV keyword, 123
class AB amplifier, 112
common-mode rejection ratio, 85
crossover distortions, 113
current gain b, 58
current mirror, 115, 118
D element (diode), 78
D keyword, 47
DC keyword, 57
DEC keyword, 87, 125
dependent sources, 37
differential amplifier, 110
diode, 38
distortion analysis, 104, 109
domino logic, 76
E type source, 37, 84, 87, 90, 91, 93, 94, 95, 119, 123
ECL logic, 80
EXP keyword, 71, 72, 75
Fermi potential, 37
FILTER program, 122
Fourier analysis, 104
frequency overshoot, 127
G type source, 84, 87, 88, 90, 91, 93, 94, 95
high precision diode, 93
intrinsic concentration, 36
inverse Chebyshev filter, 82
inverter, 74
JFET model, 55
LADDER program, 82
LAPLACE keyword, 120, 121, 122, 125
LIMPTS keyword, 47
LIST keyword, 125
load-line, 105
low-pass filter, 90, 121
M element (MOS transistor), 102, 111
magnitude, 81
magnitude limiting circuit, 97
memory cell, 74, 75
mobility of carriers, 33
MOS model, 50, 51, 53, 69, 73, 74, 79
MOSIS technology, 70
multivibrator, 94
negative feedback, 113
NJF keyword, 55
NMOS keyword, 53, 71, 72, 73, 74, 76
NOPAGE keyword, 49
NPN keyword, 56, 57, 58, 59, 60, 61, 124
NPN model, 56, 57, 78
NPN model (simple), 58, 59
opamp, 83
opamp model, 84, 87, 89, 125
operational amplifier, 83, 111
PARAM keyword, 90, 91, 108, 121
phase, 81
piecewise linear transfer function, 95
PMOS keyword, 71, 72, 73, 74, 76
PNP keyword, 110, 112
PNP model, 110
PULSE keyword, 47, 60, 61, 63, 64, 73, 97
push-pull amplifier, 114
PWR keyword, 35
Q element (bipolar transistor), 99, 100, 103
R element (resistor), 103
RES keyword, 84, 87, 125
resistivity of silicon, 34
Sallen-Key circuit, 90
Schottky diode, 60, 61, 62
Schottky TTL, 79
Schottky-clamping, 62
sense amplifier, 74
SIN keyword, 43, 48, 84, 97
slew rate, 84
small-signal model, 99, 100, 101
SWM keyword, 47
TABLE keyword, 85, 88
TEMP keyword, 37, 39
TNOM keyword, 39
TRAN keyword, 60
transconductance, 85
transfer function, 122
TTL logic, 78
V element (voltage source), 101
VALUE keyword, 33, 35, 37, 88, 125, 129
W/L ratio, 66, 75
Widlar current source, 116
Wien-bridge oscillator, 129
X subcircuit, 67, 74
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