System Design Methodology and Tools - CECS
System Design Methodology and Tools
Daniel Gajski Junyu Peng Andreas Gerstlauer Haobo Yu Dongwan Shin
Technical Report CECS-03-02 January 12, 2003
Center for Embedded Computer Systems University of California, Irvine, CA 92697, USA
{gajski, pengj, gersrtl, haoboy, dongwans}@cecs.uci.edu
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Table of Contents
Chapter 1. System level design flow
5
Chapter 2. System level modeling
35
Chapter 3. Design of a GSM Vocoder
53
Chapter 4. System level refinement
61
Chapter 5. Design of a JPEG encoder
87
Chapter 6. Design of a JBIG encoder
95
References
111
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Chapter 1 System Level Design Flow
System Level Design Flow
What is needed and what is not
Daniel D. Gajski
Center for Embedded Computer Systems University of California, Irvine
Copyright ? 2002 Daniel D. Gajski
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