Are You Really Going to Package That?

Are You Really Going to Package That?

Ira Feldman Debbora Ahlgren

Feldman Engineering Corp.

Outline

? Situation ? Cost of Test ? New Paradigm ? Probe Card Cost Drivers ? Computational Evolution ? New Approaches ? Conclusion

Feldman & Ahlgren

Increasing Wafer Probe Count

80 K

30K @ 80 ?m pitch SWTW

Feldman & Ahlgren

[ITRS]

Wafer Level Chip Scale Packaging

Fujitsu

Bad die End up here packaged

Feldman & Ahlgren

Feldman & Ahlgren

[Frazier13]

Capital Costs

Tester Pin Zero (Infrastructure)

Tester Electronics $x/site or pin

Wafer Prober or Handler

Capital Costs

Lifetime

+ Variable Costs + Overhead

CoT =

* * Yield Utilization Throughput

# of sites = m

Feldman & Ahlgren

Usual Math...

# of sites = m

Tester Pin Zero (Infrastructure)

Tester Electronics $x/site or pin

Wafer Prober or Handler

Total

TPZ $x/site * m = x * m

WP

Per Site

TPZ/m x

WP/m

[Rivoir03]

Feldman & Ahlgren

Example Calculation

# of sites = m

Tester Pin Zero (Infrastructure)

Tester Electronics $x/site or pin

Wafer Prober or Handler

COST PER SITE

m = 1

$250 K $50 K $300 K $600 K

m=8

$31.25 K $50 K $37.5 K

$118.75 K

Feldman & Ahlgren

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