Activity 2.2.3 NOR Logic Design - Digital Electronics
|Activity 2.2.3 NOR Logic Design |
Introduction
In this activity, you will revisit the voting booth monitoring system introduced in Activity 2.2.2 NAND Logic Design, but now you will implement the NOR only combinational logic circuits for the two outputs Booth and Alarm. In terms of efficiency and gate/IC utilization, this NOR only design will be compared with the previously designed AOI and NAND implementations.
Equipment
0. Circuit Design Software (CDS)
0. Digital Logic Board (DLB)
0. Integrated Circuits (74LS02)
Procedure
The truth table and K-Maps for the voting booth monitor system can be seen in Activity 2.2.2 NAND Logic Design. For your reference, the simplified logic expressions for the outputs Booth and Alarm are shown below:
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1. Using the AOI circuits you created in the 2.2.2 NAND assignment, Re-implement the two AOI circuits assuming that only 2-input NOR are gates (74LS02) available.
2. Copy and Paste your NOR circuits to a Word document.
3. Title the Word Document “2.2.3 NOR Assignment”.
4. Using your breadboard, build and test the NOR logic circuits that you designed and simulated. Verify that the circuits are working as expected and the results match the results of the simulation.
Conclusion
1. For your NOR implementations, how many ICs (i.e., 74LS02 chips) were required to implement your circuits? Again, we are counting ICs, not gates.
2. In terms of hardware efficiency, how does the NOR implementation compare to the AOI implementation (Refer to Activity 2.2.2 NAND Logic Design)?
3. In terms of hardware efficiency, how does the NOR implementation compare to the NAND implementation?
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