CSE Computer Organization and Architecture Lecture …

INSTITUTE OF AERONAUTICAL ENGINEERING

(Autonomous) Dundigal, Hyderabad -500 043

COMPUTER SCIENCE AND ENGINEERING

COURSE LECTURE NOTES

Course Name Course Code Programme Semester Course Coordinator Course Faculty

Lecture Numbers Topic Covered

COMPUTER ORGANIZATION AND ARCHITECTURE

ACS007

B.Tech

IV

Mr. E Sunil Reddy, Assistant Professor Dr.P.L.Srinivasa Murthy. Professor Mr. N Rajasekhar, Assistant Professor Ms. B.DhanaLaxmi, Assistant Professor 1-45

All

COURSE OBJECTIVES:

The course should enable the students to:

I

Understand the organization and architecture of computer systems and electronic computers.

II

Study the assembly language program execution, instruction format and instruction cycle.

III Design a simple computer using hardwired and micro programmed control methods.

IV Study the basic components of computer systems besides the computer arithmetic

V Understand input-output organization, memory organization and management, and pipelining.

COURSE LEARNING OUTCOMES (CLOs):

Students, who complete the course, will have demonstrated the ability to do the following:

CLOCode ACS007.01 ACS007.02 ACS007.03

CLO's CLO 1 CLO 2 CLO 3

At the end of the course, the student will have the ability to:

Describe the various components like input/output

MODULEs, memory MODULE, control MODULE,

arithmetic logic MODULE connected in the

basicorganization of a computer.

Understand the interfacing concept with memory

subsystem

organizationandinput/output

subsystemorganization.

Understand instruction types, addressing modes and

their formats in the assemblylanguage programs.

PO's Mapped

PO 1

PO 1

PO 2

Strength of Mapping

3

3

2

1

Describe the instruction set architecturedesign for

PO 3

1

ACS007.04

CLO 4 relatively simple microprocessor or Central processing MODULE.

Classify the functionalities of various micro

PO 3

2

ACS007.05

CLO 5 operations such as arithmetic, logic and shiftmicro operations.

Understand the register transfer languagesand micro

PO 2

2

ACS007.06

CLO 6 operations involved in bus and memory transfers.

Describe the design of control MODULE

PO3

1

ACS007.07

CLO 7 withaddress sequencing and microprogramming

Concepts.

Understand the connections among thecircuits and

PO2

1

ACS007.08

CLO 8 the functionalities in the hardwired control

MODULE.

Describe the various phases involved in the

PO 2

3

ACS007.09

CLO 9 instruction cycle viz. fetching, decoding, reading

effective address and execution ofinstruction.

Describe various data representations and explain

PO 2

1

ACS007.10

CLO 10 how arithmetic and logical operationsare performed by computers.

Classify the various instructions formats tosolve the

PO1

1

ACS007.11

CLO 11 arithmetic expressions in different addressing

modes.

Understand the functionality of various instruction

PO 2

1

ACS007.12

CLO 12 formats for writing assemblylanguage programs.

Describe the implementation of fixed pointand

PO 1

3

ACS007.13

CLO 13 floating point addition, subtraction operations.

Understand the concept of memory hierarchyand

PO 2

2

ACS007.14

CLO 14 different typed of memory chips.

Describe various modes of data transferbetween

PO2,

1

ACS007.15

CLO 15 CPU and I/O devices

PO3

Understand the virtual memory concept with page

PO 2

2

ACS007.16

CLO 16 replacement concept in memory organization

Describe the hardware organization of associate

PO1,

1

ACS007.17

CLO 17 memory and understand the readand write

PO2

operations

Describe the parallel processing concept

PO 2

2

ACS007.18

CLO 18 withmultiple functional MODULEs.

Understand the multiprocessor concept with system

PO 1

2

ACS007.19

CLO 19 bus structure and the concept of inter processor

communication andsynchronization.

Understand the different priority interrupts in the

PO 1

2

ACS007.20

CLO 20 input-output

organization

in

the

computerarchitecture.

Possess the knowledge and skills for employability

PO 2

1

ACS007.21

CLO 21 and to succeed in nationalandinternational level

competitiveexaminations.

Possess the knowledge and skills to design advanced

PO 1

1

ACS007.22

CLO 22 computer architecture for currentindustry

requirements.

2

SYLLABUS

MODULE-I INTRODUCTION TO COMPUTER ORGANIZATION

Classes: 08

Basic computer organization, CPU organization, memory subsystem organization and interfacing, input or output subsystem organization and interfacing, a simple computer levels of programming languages, assembly language instructions, instruction set architecture design, a simple instruction set architecture.

MODULE-II ORGANIZATION OF A COMPUTER

Classes: 10

Register transfer: Register transfer language, register transfer, bus and memory transfers, arithmetic micro operations,

logic micro operations, shift micro operations; Control MODULE: Control memory, address sequencing, micro program example, and design of control MODULE.

MODULE-III CPU AND COMPUTER ARITHMETIC

Classes: 08

CPU design: Instruction cycle, data representation, memory reference instructions, input-output, and interrupt, addressing modes, data transfer and manipulation, program control. Computer arithmetic: Addition and subtraction, floating point arithmetic operations, decimal arithmetic MODULE.

MODULE-IV INPUT-OUTPUT ORGANIZATION AND MEMORY ORGANIZATION Classes: 10

Memory organization: Memory hierarchy, main memory, auxiliary memory, associative memory, cache memory, virtual memory; Input or output organization: Input or output Interface, asynchronous data transfer, modes of transfer, priority interrupt, direct memory access.

MODULE-V MULTIPROCESSORS

Classes: 09

Pipeline: Parallel processing, pipelining-arithmetic pipeline, instruction pipeline; Multiprocessors: Characteristics of multiprocessors, inter connection structures, inter processor arbitration, inter processor communication and Synchronization.

Text Books:

1. M. Morris Mano, Computer Systems Architecture, Pearson, 3rdEdition,2007. 2. John D. Carpinelli, Computer Systems Organization and Architecture, Pearson, 1st Edition,2001. 3. Patterson,Hennessy,Computer OrganizationandDesign:TheHardware/SoftwareInterface,Morgan

Kaufmann, 5th Edition,2013.

Reference Books:

1. John. P. Hayes, Computer System Architecture, McGraw-Hill, 3rd Edition,1998. 2. Carl Hamacher, Zvonko G Vranesic, Safwat G Zaky, Computer Organization, McGraw-Hill, 5th

Edition,2002. 3. William Stallings, Computer Organization and Architecture, Pearson Edition, 8th Edition,2010.

Web References:

1. 2.

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MODULE-1 INTRODUCTION TO COMPUTER ORGANIZATION Basic Computer Organization ? CPU Organization ? Memory Subsystem Organization and Interfacing ? I/O Subsystem Organization and Interfacing ? A Simple Computer- Levels of Programming Languages, Assembly Language Instructions, Instruction Set Architecture Design, A simple Instruction Set Architecture. 1.1 BASIC COMPUTERORGANIZATION:

Most of the computer systems found in automobiles and consumer appliances to personal computers and main frames have some basic organization. The basic computer organization has three main components:

CPU Memorysubsystem I/Osubsystem.

The generic organization of these components is shown in the figure below.

Fig 1.1 Generic computer Organization 1.1.1 System bus: Physically the bus a set of wires. The components of a computer are connected to the buses. To send information from one component to another the source component outputs data on to the bus. The destination component then inputs the data frombus. The system has threebuses

Address bus Data bus Control bus

The uppermost bus in this figure is the address bus. When the CPU reads data or instructions from or writes data to memory, it must specify the address of the memory location it wishes toaccess.

Data is transferred via the data bus. When CPU fetches data from memory it first outputs the memory address on to its address bus. Then memory outputs the data onto the data bus. Memory then reads and stores the data

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at the properlocations.

Control bus carries the control signal. Control signal is the collection of individual control signals. These signals indicate whether data is to be read into or written out of theCPU.

Instruction cycles:

The instruction cycle is the procedure a microprocessor goes through to process an instruction. First the processor fetches or reads the instruction from memory. Then it decodes the instruction

determining which instruction it has fetched. Finally, it performs the operations necessary to execute theinstruction. After fetching it decodes the instruction and controls the execution procedure. It performs some Operation internally, and supplies the address, data & control signals needed by memory & I/O devices to execute theinstruction. The READ signal is a signal on the control bus which the microprocessor asserts when it is ready to read data from memory or I/Odevice. When READ signal is asserted the memory subsystem places the instruction code be fetched on to the computer system's data bus. The microprocessor then inputs the data from the bus and stores its internalregister. READ signal causes the memory to read the data, the WRITE operation causes the memory to store thedata. Below figure shows the memory read and memory writeoperations.

Fig 1.2: Timing diagram for memory read and memory writeoperations ? In the above figure the top symbol is CLK. This is the computer system clock. The processor uses the system clock to synchronize its operations. ? In fig (a) the microprocessor places the address on to the bus at the beginning of a clock cycle, a 0/1 sequence of clock. One clock cycle later, to allow for memory to decode the address and access its data, the microprocessor asserts the READ control signal. This causes the memory to place its data onto the system data bus. During this clock cycle, the microprocessor reads the data off the system bus and stores it in one of the registers. At the end of the clock cycle it removes the address from the address bus and deasserts the READ signal. Memory then removes the data from the data from the data bus completing the memory read operation.

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