COSC 3213: Computer Networks



CSE 2021: Computer Organization

Fall 2010

Solution to Assignment # 3: Multicycle Implementation

Note that these questions are taken from the previous final exmas of CSE2021 and should serve as practice questions for multicycle implementation section of the final exam.

Question 1

A. We have to modify the existing datapath so that PC + 4 can be written to register 31 (corresponding to $ra) while PC is written with the new jump address. To accomplish this, we expand

1. The multiplexor for RegDst to include 31 as an additional input. With three inputs to the multiplexor, control RegDst should be expanded to 2 bits. To select 31 as the input, we assume that RegDst = 10.

2. The multiplexor for MemtoReg to include PC + 4 as an additional input. With three inputs to the multiplexor, control MemtoReg is expanded to 2 bits. To select PC + 4, we set MemtoReg = 10.

The execution steps for the jal instruction are:

Step 1: Instruction Fetch: remains unchanged

Step 2 Instruction Decode and Register Fetch: remains unchanged

Step 3 Execution, Memory Address Computation, Branch, Jump or Jump and Link Completion:

jal: Reg[31] = PC + 4;

PC = PC[31-28] || ( IR[25-0] ................
................

In order to avoid copyright disputes, this page is only a partial summary.

Google Online Preview   Download