DRAM - University of California, San Diego
[Pages:32]DRAM
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0 Wordline 0
Wordline 1
+
Bitline 1
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0 Wordline 0
Wordline 1
+
Bitline 1
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0 Wordline 0
Wordline 1
+
Bitline 1
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0
Bitline 1
Wordline 0
Bit destroyed!
Wordline 1
+
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0 Wordline 0
Wordline 1
+
Bitline 1
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
Dynamic Random Access Memory (DRAM)
? Storage ? Charge on a capacitor ? Decays over time (us-scale) ? This is the "dyanamic" part. ? About 6F2: 20x better than SRAM
? Reading ? Precharge ? Assert word line ? Sense output ? Refresh data
Bitline 0
Bitline 1
Wordline 0
Bit Restored
Wordline 1
+
Only one bit line is read at a time. The other bit line serves as a reference. The bit cells attached to Wordline 1 are not shown.
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